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Mechanism investigation of pre-existing void-induced multi-modal electro-migration behavior

Zhaoxiang Han and Weihai Fan

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 Corresponding author: Weihai Fan, WeiHai_Fan@smics.com

DOI: 10.1088/1674-4926/43/5/054103

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Abstract: A multi-modal time-to-failure distribution for an electro-migration (EM) structure has been observed and studied from long duration in-situ EM experiment, for which the failure mechanism has been investigated and discussed comprehensively. The mixed EM failure behavior strongly suggest that the fatal voids induced EM failure appear at various locations along the EM structure. This phenomenon is believed to be highly related to the existence of pre-existing voids before EM stress. Meanwhile, the number and location of the pre-existing voids can influence the EM failure mode significantly. Based on our research, a potential direction to improve the EM lifetime of Cu interconnect is presented.

Key words: reliabilityelectro-migrationmulti-modalpre-existing void



[1]
Strong A W, Wu E Y, Vollertsen R P, et al. Reliability wearout mechanisms in advanced CMOS technologies. John Wiley & Sons, 2009
[2]
Hau-Riege C S. An introduction to Cu electromigration. Microelectron Reliab, 2004, 44(2), 195 doi: 10.1016/j.microrel.2003.10.020
[3]
Korhonen M A, Bo/rgesen P, Tu K N, et al. Stress evolution due to electromigration in confined metal lines. J Appl Phys, 1993, 73(8), 3790 doi: 10.1063/1.354073
[4]
Meyer M A, Herrmann M, Langer E, et al. In situ SEM observation of electromigration phenomena in fully embedded copper interconnect structures. Microelectron Eng, 2002, 64(1–4), 375 doi: 10.1016/S0167-9317(02)00811-0
[5]
Lloyd J R. Electromigration failure. J Appl Phys, 1991, 69(11), 7601 doi: 10.1063/1.347529
[6]
Filippi R G, Wang P C, Brendler A, et al. The effect of a threshold failure time and bimodal behavior on the electromigration lifetime of copper interconnects. 2009 IEEE International Reliability Physics Symposium, 2009, 444 doi: 10.1109/IRPS.2009.5173295
[7]
Hu C K, Harper J M E. Copper interconnections and reliability. Mater Chem Phys, 1998, 52(1), 5 doi: 10.1016/S0254-0584(98)80000-X
[8]
Gan C L, Thompson C V, Pey K L, et al. Effect of current direction on the lifetime of different levels of Cu dual-damascene metallization. Appl Phys Lett, 2001, 79(27), 4592 doi: 10.1063/1.1428410
[9]
Dai Y Y, Ng M Z, Anantha P, et al. Enhanced copper micro/nano-particle mixed paste sintered at low temperature for 3D interconnects. Appl Phys Lett, 2016, 108(26), 263103 doi: 10.1063/1.4954966
[10]
Lane M W, Liniger E G, Lloyd J R. Relationship between interfacial adhesion and electromigration in Cu metallization. J Appl Phys, 2003, 93(3), 1417 doi: 10.1063/1.1532942
[11]
Rosenberg R, Edelstein D C, Hu C K, et al. Copper metallization for high performance silicon technology. Ann Rev Mater Sci, 2000, 30(1), 229 doi: 10.1146/annurev.matsci.30.1.229
[12]
Mario H, Lim M K, Gan C L. Impact of pre-existing voids on electromigration in copper interconnects. 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2012, 1 doi: 10.1109/IPFA.2012.6306330
[13]
Choi Z S, Lee J, Lim M K, et al. Void dynamics in copper-based interconnects. J Appl Phys, 2011, 110(3), 033505 doi: 10.1063/1.3611408
Fig. 1.  (Color online) Schematic diagram of EM structure.

Fig. 2.  (Color online) TTF distribution confirmation at several runs.

Fig. 3.  (Color online) EM TTF distribution at long time intended test.

Fig. 4.  (Color online) Relative resistance changes over time during EM stress.

Fig. 5.  (Color online) Top view SEM images of selected EM structures.

Fig. 6.  (Color online) Cross-sectional TEM result of EM structure SN1.

Fig. 7.  (Color online) Top view SEM, side view TEM results and EDX element mapping results of EM structure. (a) SN2. (b) SN3.

Fig. 8.  (Color online) Top view SEM, side view TEM results and EDX element mapping results of EM structure SN4.

Fig. 9.  (Color online) Top view SEM, side view TEM results and EDX element mapping results of EM structure. (a) SN5. (b) SN6.

Fig. 10.  Time to failure distributions plot for the EM samples with less defeat.

Table 1.   The initial resistance and TTF of all selected samples.

SampleR0 (Ω)TTFSampleR0 (Ω)TTF
SN176114SN47691071
SN2748120SN57571743
SN3788289SN6786/
DownLoad: CSV
[1]
Strong A W, Wu E Y, Vollertsen R P, et al. Reliability wearout mechanisms in advanced CMOS technologies. John Wiley & Sons, 2009
[2]
Hau-Riege C S. An introduction to Cu electromigration. Microelectron Reliab, 2004, 44(2), 195 doi: 10.1016/j.microrel.2003.10.020
[3]
Korhonen M A, Bo/rgesen P, Tu K N, et al. Stress evolution due to electromigration in confined metal lines. J Appl Phys, 1993, 73(8), 3790 doi: 10.1063/1.354073
[4]
Meyer M A, Herrmann M, Langer E, et al. In situ SEM observation of electromigration phenomena in fully embedded copper interconnect structures. Microelectron Eng, 2002, 64(1–4), 375 doi: 10.1016/S0167-9317(02)00811-0
[5]
Lloyd J R. Electromigration failure. J Appl Phys, 1991, 69(11), 7601 doi: 10.1063/1.347529
[6]
Filippi R G, Wang P C, Brendler A, et al. The effect of a threshold failure time and bimodal behavior on the electromigration lifetime of copper interconnects. 2009 IEEE International Reliability Physics Symposium, 2009, 444 doi: 10.1109/IRPS.2009.5173295
[7]
Hu C K, Harper J M E. Copper interconnections and reliability. Mater Chem Phys, 1998, 52(1), 5 doi: 10.1016/S0254-0584(98)80000-X
[8]
Gan C L, Thompson C V, Pey K L, et al. Effect of current direction on the lifetime of different levels of Cu dual-damascene metallization. Appl Phys Lett, 2001, 79(27), 4592 doi: 10.1063/1.1428410
[9]
Dai Y Y, Ng M Z, Anantha P, et al. Enhanced copper micro/nano-particle mixed paste sintered at low temperature for 3D interconnects. Appl Phys Lett, 2016, 108(26), 263103 doi: 10.1063/1.4954966
[10]
Lane M W, Liniger E G, Lloyd J R. Relationship between interfacial adhesion and electromigration in Cu metallization. J Appl Phys, 2003, 93(3), 1417 doi: 10.1063/1.1532942
[11]
Rosenberg R, Edelstein D C, Hu C K, et al. Copper metallization for high performance silicon technology. Ann Rev Mater Sci, 2000, 30(1), 229 doi: 10.1146/annurev.matsci.30.1.229
[12]
Mario H, Lim M K, Gan C L. Impact of pre-existing voids on electromigration in copper interconnects. 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2012, 1 doi: 10.1109/IPFA.2012.6306330
[13]
Choi Z S, Lee J, Lim M K, et al. Void dynamics in copper-based interconnects. J Appl Phys, 2011, 110(3), 033505 doi: 10.1063/1.3611408
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    Received: 02 November 2021 Revised: 01 December 2021 Online: Accepted Manuscript: 24 January 2022Uncorrected proof: 25 January 2022Published: 01 May 2022

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      Zhaoxiang Han, Weihai Fan. Mechanism investigation of pre-existing void-induced multi-modal electro-migration behavior[J]. Journal of Semiconductors, 2022, 43(5): 054103. doi: 10.1088/1674-4926/43/5/054103 ****Z X Han, W H Fan. Mechanism investigation of pre-existing void-induced multi-modal electro-migration behavior[J]. J. Semicond, 2022, 43(5): 054103. doi: 10.1088/1674-4926/43/5/054103
      Citation:
      Zhaoxiang Han, Weihai Fan. Mechanism investigation of pre-existing void-induced multi-modal electro-migration behavior[J]. Journal of Semiconductors, 2022, 43(5): 054103. doi: 10.1088/1674-4926/43/5/054103 ****
      Z X Han, W H Fan. Mechanism investigation of pre-existing void-induced multi-modal electro-migration behavior[J]. J. Semicond, 2022, 43(5): 054103. doi: 10.1088/1674-4926/43/5/054103

      Mechanism investigation of pre-existing void-induced multi-modal electro-migration behavior

      DOI: 10.1088/1674-4926/43/5/054103
      More Information
      • Zhaoxiang Han:got his MS degree from China University of Petroleum (east) in 2019. Now he works in Semiconductor Manufacturing International Corporation (Shanghai) as a reliability engineer. His research interests include semiconductor device and BEOL metallization reliability
      • Weihai Fan:got his engineering master degree from Fudan University in 2009. He was a senior reliability engineer in SMIC after graduated in 2002 before join Verisilioon as a reliability project leader in Jul 2010, and he joined SMIC in 2016 as a senior manager and now in charge of semiconductor BEOL reliability team including EM & SM failure mechanism and improvement
      • Corresponding author: WeiHai_Fan@smics.com
      • Received Date: 2021-11-02
      • Accepted Date: 2022-01-22
      • Revised Date: 2021-12-01
      • Available Online: 2022-04-18

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