Citation: |
Zhu Zhangming, Li Yani, Yang Yintang. An Embedded 1.8V 10bit 120MS/s CMOS Current Steering Digital-to-Analog Converter IP Core[J]. Journal of Semiconductors, 2008, 29(3): 588-592.
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Zhu Z M, Li Y N, Yang Y T. An Embedded 1.8V 10bit 120MS/s CMOS Current Steering Digital-to-Analog Converter IP Core[J]. J. Semicond., 2008, 29(3): 588.
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An Embedded 1.8V 10bit 120MS/s CMOS Current Steering Digital-to-Analog Converter IP Core
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Abstract
Based on a low swing,low crossing point current switch driver and central symmetry Q2 random walk pMOS current source layout routing methods,a 1.8V 10bit 120MS/s CMOS current-steering digital-to-analog converter IP core is implemented in a TSMC 0.18μm CMOS process.With a supply of 1.8V,the integral and differential nonlinearity are measured to be less than 0.45LSB and 0.25LSB,respectively.When the output signal frequency is 24.225MHz at 120MHz sampling rate,the SFDR is measured to be 64.9dB.The die area is about 0.43mm×0.52mm. -
References
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Proportional views