J. Semicond. > 2008, Volume 29 > Issue 3 > 559-562

PAPERS

Impact of Two-Dimension Effects on Threshold Voltage of Fully Depleted SOI MOSFETs with Asymmetric Halos

Xu Jian, Ding Lei, Han Zhengsheng and Zhong Chuanjie

+ Author Affiliations

PDF

Abstract: Based on an analytical threshold voltage model of fully depleted silicon-on-insulator (SOI) MOSFETs with asymmetric HALO structures,the impact of the two-dimension effects in a buried-oxide layer on threshold voltage is discussed.Compared to the 1D model,two-dimensional effects in the buried-oxide layer of the deep submicron MOSFET device create the short-channel effect more quickly.The predictions of the new model are in good agreement with those of the two-dimension numerical simulator MEDICI.

Key words: threshold voltagetwo-dimension effectsfully depleted SOIHALO structure

1

A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation

Han Wang, Lin Tan

Journal of Semiconductors, 2016, 37(2): 025005. doi: 10.1088/1674-4926/37/2/025005

2

A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric

Chaowen Liu, Jingping Xu, Lu Liu, Hanhan Lu, Yuan Huang, et al.

Journal of Semiconductors, 2016, 37(2): 024004. doi: 10.1088/1674-4926/37/2/024004

3

A monolithic integrated low-voltage deep brain stimulator with wireless power and data transmission

Zhang Zhang, Ye Tan, Jianmin Zeng, Xu Han, Xin Cheng, et al.

Journal of Semiconductors, 2016, 37(9): 095003. doi: 10.1088/1674-4926/37/9/095003

4

Modeling on oxide dependent 2DEG sheet charge density and threshold voltage in AlGaN/GaN MOSHEMT

J. Panda, K. Jena, R. Swain, T. R. Lenka

Journal of Semiconductors, 2016, 37(4): 044003. doi: 10.1088/1674-4926/37/4/044003

5

Model development for analyzing 2DEG sheet charge density and threshold voltage considering interface DOS for AlInN/GaN MOSHEMT

Devashish Pandey, T.R. Lenka

Journal of Semiconductors, 2014, 35(10): 104001. doi: 10.1088/1674-4926/35/10/104001

6

Dynamic threshold voltage operation in Si and SiGe source junctionless tunnel field effect transistor

Shibir Basak, Pranav Kumar Asthana, Yogesh Goswami, Bahniman Ghosh

Journal of Semiconductors, 2014, 35(11): 114001. doi: 10.1088/1674-4926/35/11/114001

7

Analytical modeling of drain current and RF performance for double-gate fully depleted nanoscale SOI MOSFETs

Rajiv Sharma, Sujata Pandey, Shail Bala Jain

Journal of Semiconductors, 2012, 33(2): 024001. doi: 10.1088/1674-4926/33/2/024001

8

Capacitance-voltage analysis of a high-k dielectric on silicon

Davinder Rathee, Sandeep K. Arya, Mukesh Kumar

Journal of Semiconductors, 2012, 33(2): 022001. doi: 10.1088/1674-4926/33/2/022001

9

Silicide-block-film effects on high voltage drain-extended MOS transistors

Wang Lei, Gao Chao, Liu Bo, Hu Jian, Lee Po, et al.

Journal of Semiconductors, 2009, 30(3): 034003. doi: 10.1088/1674-4926/30/3/034003

10

A Temperature-Dependent Model for Threshold Voltage and Potential Distribution of Fully Depleted SOI MOSFETs

Tang Junxiong, Tang Minghua, Yang Feng, Zhang Junjie, Zhou Yichun, et al.

Journal of Semiconductors, 2008, 29(1): 45-49.

11

Threshold Voltage of AIGaN/GaN HFET

Lin Zhaojun, Zhao Jianzhi, Zhang Min

Chinese Journal of Semiconductors , 2007, 28(S1): 422-425.

12

Threshold Voltage Model for a Fully Depleted SOI-MOSFETwith a Non-Uniform Profile

Zhang Guohe, Shao Zhibiao, Zhou Kai

Chinese Journal of Semiconductors , 2007, 28(6): 842-847.

13

Dual Material Gate SOI MOSFET with a Single Halo

Li Zunchao, Jiang Yaolin, Wu Jianmin

Chinese Journal of Semiconductors , 2007, 28(3): 327-331.

14

Design of a Monolithic CMOS LC-Voltage Controlled Oscillator with Low Phase Noise for 4GHz Frequency Synthesizers

Tang Lu, Wang Zhigong, Huang Ting, Li Zhiqun

Chinese Journal of Semiconductors , 2006, 27(3): 459-466.

15

A Novel Offset-Cancellation Technique for Low Voltage CMOS Differential Amplifiers

Han Shuguang, Chi Baoyong, Wang Zhihua

Chinese Journal of Semiconductors , 2006, 27(5): 778-782.

16

A New Direct Tunneling Gate Current Model for Short Channel MOSFETs with HALO Structure

Zhao Yao, Xu Mingzhen, Tan Changhua

Chinese Journal of Semiconductors , 2006, 27(7): 1264-1268.

17

2D Threshold-Voltage Model for High-k Gate-Dielectric MOSFETs

Ji Feng, Xu Jingping, Lai P T, Chen Weibing, Li Yanping, et al.

Chinese Journal of Semiconductors , 2006, 27(10): 1725-1731.

18

Simulation of a Double-Gate Dynamic Threshold Voltage Fully Depleted Silicon-on-Insulator nMOSFET

Bi Jinshun, Wu Junfeng, Hai Chaohe

Chinese Journal of Semiconductors , 2006, 27(1): 35-40.

19

Analytical Modeling of Threshold Voltage for Double-Gate MOSFET Fully Comprising Quantum Mechanical Effects

Zhang Dawei, Tian Lilin,and Yu Zhiping

Chinese Journal of Semiconductors , 2005, 26(3): 429-435.

20

An Analytical Threshold Voltage Model for Fully Depleted SOI MOSFETs

Li Ruizhen, Han Zhengsheng

Chinese Journal of Semiconductors , 2005, 26(12): 2303-2308.

  • Search

    Advanced Search >>

    GET CITATION

    shu

    Export: BibTex EndNote

    Article Metrics

    Article views: 3380 Times PDF downloads: 1495 Times Cited by: 0 Times

    History

    Received: 18 August 2015 Revised: 01 November 2007 Online: Published: 01 March 2008

    Catalog

      Email This Article

      User name:
      Email:*请输入正确邮箱
      Code:*验证码错误
      Xu Jian, Ding Lei, Han Zhengsheng, Zhong Chuanjie. Impact of Two-Dimension Effects on Threshold Voltage of Fully Depleted SOI MOSFETs with Asymmetric Halos[J]. Journal of Semiconductors, 2008, 29(3): 559-562. ****Xu J, Ding L, Han Z S, Zhong C J. Impact of Two-Dimension Effects on Threshold Voltage of Fully Depleted SOI MOSFETs with Asymmetric Halos[J]. J. Semicond., 2008, 29(3): 559.
      Citation:
      Xu Jian, Ding Lei, Han Zhengsheng, Zhong Chuanjie. Impact of Two-Dimension Effects on Threshold Voltage of Fully Depleted SOI MOSFETs with Asymmetric Halos[J]. Journal of Semiconductors, 2008, 29(3): 559-562. ****
      Xu J, Ding L, Han Z S, Zhong C J. Impact of Two-Dimension Effects on Threshold Voltage of Fully Depleted SOI MOSFETs with Asymmetric Halos[J]. J. Semicond., 2008, 29(3): 559.

      Impact of Two-Dimension Effects on Threshold Voltage of Fully Depleted SOI MOSFETs with Asymmetric Halos

      • Received Date: 2015-08-18
      • Accepted Date: 2007-10-08
      • Revised Date: 2007-11-01
      • Published Date: 2008-02-28

      Catalog

        /

        DownLoad:  Full-Size Img  PowerPoint
        Return
        Return