| Citation: |
Wang Han, Ye Qing. Design and Stability Analysis of a 0.6V Supply CMOS Voltage Reference[J]. Journal of Semiconductors, 2006, 27(8): 1508-1513.
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Wang H, Ye Q. Design and Stability Analysis of a 0.6V Supply CMOS Voltage Reference[J]. Chin. J. Semicond., 2006, 27(8): 1508.
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Design and Stability Analysis of a 0.6V Supply CMOS Voltage Reference
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Abstract
An ultra-low power CMOS voltage reference circuit is presented.To find the loop parameters of the op-amp and the core circuit,different techniques called loop gain and return ratio are applied,respectively.Fabricated in an SMIC 0.18μ CMOS process,the chip generates a reference voltage of 0.4V in a power supply range of 0.6～1.5V with a maximum temperature coefficient of 80ppm/℃.The total current is 4.8μA and the chip area (not including the PAD) is 0.045mm2.-
Keywords:
- voltage reference,
- ultra-low supply,
- stability,
- loop gain,
- return ratio,
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References
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Proportional views
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