In this paper, the sample of CuPc/SiO2 was fabricated. Its morphology was characterized by atomic force microscopy (AFM) and the electron states were investigated by X-ray photoelectron spectroscopy (XPS), respectively. In order to investigate on these spectra in detail, all of these spectra were normalized to the peak height of the most intense peak, and each component was fitted with a single Gaussian function. Analyzed results showed that O element had great bearing on the electron states, and SiO2 layer produced by spurting technology has advantage than that by oxidation technology.

Disk-like large grain poly-si is formed using solution-based MIC (metal-induced crystallization).A Ni gettering treatment technique is adopted to improve the poly-Si material quality.Using this poly-Si material as the active layer,the leakage and uniformity characteristics of TFTs are improved.Additionally,the pixel circuit and their layout of the two TFTs are demonstrated.Adopting a 6-mask process similar to that of the normal a-si TFT AMLCD product line,125mm QVGA poly-si TFT active matrix panels for OLED are fabricated.A 125mm QVGA AMOLED panel,which can display color video image,is implemented using the active matrix panel.

This paper presents the fabrication and performance of a 0.18μm nMOSFET for RF applications.This device features a nitrided oxide/poly-silicon gate stack,a lightly-doped-drain source/drain extension,a retrograde channel doping profile,and a multiple-finger-gate layout,each of which is achieved with conventional semiconductor fabrication facilities.The 0.18μm gate length is obtained by e-beam direct-writing.The device is fabricated with a simple process flow and exhibits excellent DC and RF performance:the threshold voltage of 0.52V,the sub-threshold swing of 80mV/dec,the drain-induced-barrier-lowering factor of 69mV/V,the off-state current of 0.5nA/μm,the saturation drive current of 458μA/μm (for the 6nm gate oxide and the 3V supply voltage),the saturation transconductance of 212μS/μm,and the cutoff frequency of 53GHz.

The fabrication of Bragg gratings on silicon-on-insulator (SOI) rib waveguides using electron-beam lithography is presented.The grating waveguide is optimally designed for actual photonic integration.Experimental and theoretical evaluations of the Bragg grating are demonstrated.By thinning the SOI device layer and deeply etching the Bragg grating,a large grating coupling coefficient of 30cm-1 is obtained.

Lateral oxidation in vertical cavity surface emitting lasers (VCSELs) is described,and its characteristics are investigated.A linear growth law is found for stripe mesas.However,oxide growth (above 435℃) follows a nonlinear law for the two geometry mesa structures which we employ in VCSEL.Theoretical analysis indicates that mesa structure geometry influences oxide growth rate at higher temperatures.

We design and fabricate a 128×128 AlGaAs/GaAs quantum well infrared photodetector focal plane array (FPA).The device is achieved by metal organic chemical vapor deposition and GaAs integrated circuit processing technology.A test structure of the photodetector with a mesa size of 300μm×300μm is also made in order to obtain the device parameters.The measured dark current density at 77K is 1.5E-3A/cm2 with a bias voltage of 2V.The peak of the responsivity spectrum is at 8.4μm,with a cutoff wavelength of 9μm.The blackbody detectivity is shown to be 3.95E8 (cm·Hz1/2) /W.The final FPA is flip-chip bonded on a CMOS read-out integrated circuit.The infrared thermal images of some targets at room temperature background are successfully demonstrated at 80K operating temperature with a ratio of dead pixels of less than 1%.

A CuPc/SiO2 sample is fabricated.Its morphology is characterized by atomic force microscopy,and the electron states are investigated by X-ray photoelectron spectroscopy.In order to investigate these spectra in detail,all of these spectra are normalized to the height of the most intense peak,and each component is fitted with a single Gaussian function.Analysis shows that the O element has great bearing on the electron states and that SiO layers produced by spurting technology are better than those produced by oxidation technology.

A novel,highly linear sampling switch suitable for low-voltage operation is proposed.This switch not only eliminates the nonlinearity introduced by gate-source voltage variation,but also reduces the nonlinearity resulting from threshold voltage variation,which has not been accomplished in earlier low-voltage sampling switches.This is achieved by adopting a replica transistor with the same threshold voltage as the sampling transistor.The effectiveness of this technique is demonstrated by a prototype design of a sampling switch in 0.35μm.The proposed sampling switch achieves a spurious free dynamic range of 111dB for a 0.2MHz,1.2Vp-p input signal,sampled at a rate of 2MS/s,about 18dB over the Bootstrapped switch.Also,the on-resistance variation is reduced by 90%.This method is especially useful for low-voltage,high resolution ADCs,which is a hot topic today.

This paper presents a low noise,1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications.Active inductor shunt peaking technology and noise optimization are used in the design of a trans-impedance amplifier,which overcomes the problem of inadequate bandwidth caused by the large parasitical capacitor of the CMOS photodiode.Experimental results indicate that with a parasitical capacitance of 2pF,this circuit works at 1.25Gb/s.A clear eye diagram is obtained with an input optical signal of -17dBm.With a power supply of 3.3V,the front-end amplifier consumes 122mW and provides a 660mV differential output.

High-resolution X-ray diffraction is utilized to analyze the micro-structure of annealed and as-grown GaN thin films grown by metalorganic chemical vapor deposition.Profile-fitting analyses indicate that the annealed ones have larger full widths at half maximum of (0002) rocking curve and lower densities of screw-type threading dislocations than the as-grown samples.A chemical etching experiment supports the above results.Our results indicate that profile-fitting is necessary when XRD is used to characterize the structure of GaN thin films.

A single crystalline InAlGaN film is successfully grown on a sapphire substrate by radio-frequency plasma-excited molecular beam epitaxy.The streaky RHEED pattern observed during growth indicates a layer-by-layer growth mode.Rutherford backscattering spectrometry (RBS) shows that the In,Al,and Ga contents in the InAlGaN film are 2%,22%,and 76%, respectively.Triple-axis X-ray diffraction shows that the full width at half maximum of the InAlGaN (0002) peak is 4.8′.There are some mountain-like hillocks and pits on the surface of the InAlGaN film.Atomic-force microscopy shows that the RMS of the InAlGaN film is 2.2nm.Photoconductance measurements show that the energy gap of InAlGaN film is 3.76eV.

High-quality ZnO thin films are deposited on different Si substrates by double-connected low pressure metal-organic chemical vapor deposition (LP-MOCVD).Their composition and structural characteristics are characterized using Rutherford backscattering (RBS)/channeling and X-ray diffraction (XRD) technology.The sample with a SiC buffer layer on the Si(111) substrate has a smaller full-width at half maximum of XRD (0002) reflection,and the elastic strain of the c axis with a smaller value is changed from positive to negative.These results show that the SiC buffer layer can reduce the strain from the lattice mismatch between ZnO and the Si substrate and improve the quality of single-crystal ZnO films.

We grow 50mm-diameter InAs single crystals of 〈100〉 and 〈111〉 orientations with liquid encapsulated Czochralski (LEC) method.The segregation behavior,lattice hardening effect,and doping efficiency of n-type impurities S, Sn and p-type impurities Zn, Mn are studied.The lattice perfection of the InAs single crystal is studied with X-ray diffraction.The polishing,chemical etching and cleaning of an InAs wafer are analyzed.An epi-ready InAs polished single crystal wafer is realized.

Vanadium ion (V+) implantation at a high energy (2100keV) is successfully used to form semi-insulating layers in 4H-SiC.The fabrication processes and measurements of the implanted layer are reported in detail.The profile of the ion implantation is simulated with the Monte Carlo simulator TRIM.Test patterns on semi-insulating 4H-SiC samples are processed into a mesa structure,and resistivity measurements are conducted.The resistivities of V+-implanted layers are strongly dependent on the conduction type of the initial 4H-SiC samples,and they are about 1.6E10 and 7.6E6Ω·cm respectively for p- and n-type samples at room temperature.The resistivities of the as-implanted samples increase with increasing annealing temperature for both p- and n-type samples due to the introduction of compensating levels.However,they decrease slightly beyond 1700℃ due to the diffusion of vanadium.The temperature dependent resistivity behavior in V+-implanted n-type 4H-SiC indicates an activation energy of 0.78eV.

The morphology and density distribution of etch pits formed by Schaake and Chen etchants on the {111} B face of HgCdTe liquid phase epitaxy films are studied.The experimental results of the deep etches show that threading dislocations with certain orientations really exist in the epilayer.After both etchants acted on the same sample,it is observed that most of the etch pits formed by Schaake and Chen etchants have a one-to-one correspondence in distribution.In addition to these etch pits,it is also found that there is another kind of etch pit for both Schaake and Chen etchants,but neither of them threads the HgCdTe epilayer.Their density distributions and density multiplications near the interface are the same.These etch pits formed by the Schaake etchant also have a multiplication around macroscopic defects,but this phenomena is not observed for those of the Chen etchant.

CIGS thin films are deposited in a three-stage co-evaporation process by using a simple PID controller.The composition of the CIGS thin films can be controlled on-line by monitoring the temperature change of the substrates while using constant power to heat the substrates.These methods can greatly improve the controllability and reproducibility of depositing CIGS thin films.The surfaces of the CIGS films are smooth, with a roughness less than 10nm. However,the preferential orientations of the CIGS thin films with the same component are different,though most of them are (112).Moreover,the grain sizes of the CIGS thin films are also very different.Although the CIGS films have Cu-poor compositions,Cu/(In+Ga)＜1,most of them are p-type semiconductors, and a few are n-type,as determined by Hall measurement.

We experimentally study THz generation and detection in 〈111〉 ZnSe samples using optical rectification and electro-optic sampling.A THz radiation pulse with a width of 113fs (full width at half maximum),results in a wideband THz spectrum near 5.8THz with a peak signal at 3THz.We also examine the dependence of the peak THz electric field on optica pump power.The generated peak electric field increase linearly with increasing optical pump power in the ZnSe sample with a clean surface,while for the sample with a carbon-sprinkled surface,the peak field exhibits a slow saturation behavior at powers greater than 250mW.It seems that the damages surface decreases the optical rectification efficiency.

We study a new preparation process for carbon nanotube (CNT) cold cathode,making use of the properties of low melting point and high conductivity. In this new process,the traditional organic binder or Ag paste is replaced with Ag nano-particles.A mixture paste of CNT,Ag nano-particles,and other organic solvents is spread on Cu-coated glass substrate.Through the melting and connecting of Ag nano-particles after sintering for 30min at 250℃,a flat CNT film with good field emission performance is obtained.Measurements reveal that the field emission properties are the best when CNT∶Ag mass ratio is 1∶1, with a threshold electric field of 4.9V/μm and an emission current density of 41mA/cm2 at 5.7V/μm. Too many Ag nano-particles in the mixed paste result in a noticeable decrease of the emission current at high voltages because of the coating CNT by the melting of Ag films. On the other hand, poor adhesion to the substrate and electric conductivity of the CNT cathode result when there are too few Ag nano-particles.

A high-performance RF solenoid microinductor is fabricated using microelectromechanical systems technology.This inductor employs an electroplated copper coil to reduce the series resistance,and its total area is 880μm×350μm,which saves chip area significantly compared with planar microinductors.The measurement results show that this inductor has a high Q-factor over a wide range of operating frequencies.The maximum Q-factor of this inductor is 38 and the inductance is 1.82nH at 6GHz.

The timing characteristics of random telegraph signal (RTS) in deep submicron MOS devices are investigated,and a novel method is proposed to determine the spatial distribution of the border traps by forward and backward RTS measurements in the non-saturation state.The measurements of a 0.18μm×0.15μm nMOS device show that the two-dimension position of the trap in the oxide of a deep submicron MOS device can be precisely calculated with this method.This method can also evaluate the reliability of deep submicron MOS devices.

A novel InP/InGaAs/InP double heterojunction bipolar transistor (DHBT) structure is designed,in which a thin heavily doped n+-InP layer between the base and the collector is used to eliminate the energy spike at the B-C junction and overcome the electron blocking effect.The dependence of the effective barrier spike at the B-C junction and the I-V characteristics of the DHBT on the thickness and doping density of the n+-InP composite collector are analyzed theoretically.The results show that the device performance is optimal when the doping density is 3E19cm-3 and the thickness is 3nm for the n+-InP composite collector.The InP/InGaAs/InP DHBTs with composite doping collector are grown by gas source molecular beam epitaxy (GSMBE).The DC characteristics of the devices demonstrate that the InP/InGaAs/InP DHBT designed here effectively eliminates the energy spike at the B-C junction and improves the device performance.

After 3E4s of high-field stress,the drain current and transconductance of AlGaN/GaN HEMTs grown on sapphire are decreased by 5.2% and 7.6%,respectively.The degradation is more obvious than under high stress bias.The reason for this is investigated and compared to the current collapse that occurs under DC sweeping.The effects of UV irradiation on the recovery of the devices are observed.UV illumination can eliminate the DC sweeping current collapse,but it cannot reverse the degradation characteristics caused by the high-field stress.

A RF power LDMOS with a trench drift region is optimally designed. Rectangular,converse triangular,and triangular trench structures are proposed based on its frequency characteristic,and the position the depth,and the width of the trench are analyzed.Under the same condition of breakdown voltage and on-resistance,the optimized trench structure is triangular,which can decrease the feedback capacitance by 24% and increase the cut-off frequency by 15%.

A 1200V multi-region double RESURF LDMOS with a p-type buried layer,which has multiple p regions in the n-drift layer of a single RESURF structure is proposed for improving the surface electric field,increasing the concentration of the n-drift layer,and reducing the on-resistance of LDMOS.A 1200V BCD technology based on standard CMOS technology is realized by adding pn isolation and p-top implantation.Using this technology we develop a power half bridge driver.The breakdown voltages of the LDMOS,nMOS, and pMOS are 1210,43.8,and -27V,respectively, the BVceo of the npn is 76V in the driver.The 1200V BCD technology thus can be used in the design of HVIC.

Ultra-fine oxidized titanium (TiOx) lines are formed on the surface of a titanium (Ti) layer by an atomic force microscope (AFM) tip acting as a selective anodization electrode.The Ti layers are about 3nm thick on the GaAs substrates and are formed by magnetron sputtering.The Ti-TiOx-Ti construction forms a metal-insulator-metal tunneling junction,which is the basic structure of the ultra-fast photoconductive switch.The TiOx works as an energy barrier for the electrons.In order to illustrate the effect of the TiOx line width on the tunneling and to determine the narrowest TiOx line as well as the conditions under which it can be formed without leading to the breakdown of the tunneling junction,TiOx lines with widths of 15.6,34.2,and 46.9nm are fabricated by changing the ambient humidity while keeping the scanning speed,oxygen concentration,and applied voltage fixed.The I-V characteristics of tunneling junctions with different widths are measured.The results indicate that the narrowest TiOx line with a width of about 10nm, can be fabricated between the two electrodes of the ultra-fast photoconductive switch when the voltage between the two electrodes is 6V without leading to the breakdown of the tunneling junction.

In view of the transport mechanism of electrical carriers,the factors involved in the current overflow in GaN-based laser diodes are analyzed,and the aluminum mole fraction as well as the p-doping concentration of the AlGaN electron blocking layer are optimized.The results indicate that the appropriate barrier height (the Al mole fraction) is lower when the p-doping concentration is higher.

This paper reports that the frequency responses of a direct-modulated DFB laser diode can be improved using an injection locking method.In the experiments,the optical output power of the master laser is injected into the slave laser via a circulator.The optical spectra and frequency responses of the slave laser with and without injection are measured, respectively.The modulation bandwidth and the relaxation oscillation frequencies of the laser are quite different at different injection powers and wavelengths.The frequency responses can be improved by choosing the proper optical power and wavelength of injection.We believe that the improvement of the frequency response is due to a two-mode beat that includes the main mode of the slave laser and the master laser mode, which coincides with the side band of the slave laser.This theory is supported by the experiments.

1730nm wavelength semiconductor laser diodes(LDs) for use in medical appliances are reported.The LD structure is grown by low-pressure MOCVD,and the active region consists of five periods of InGaAs quantum wells and InGaAsP quantum barriers.The LD has a pnpn-confined buried heterojunction structure,whose ridge width and cavity length are 2μm and 300μm,respectively.After facet coating,the threshold current of the LDs is about 18±5mA at room temperature,and the operating current is about 60±5mA at an output power of 8mW.For the TO-packaged LDs,the output power is over 5mW under a 100mA operating current,and the output wavelengths are 1732±10nm.The results of high-temperature, constant-current accelerated aging show that the LDs are reliable over long operation periods and could have practical applications.

The output amplified spontaneous emission (ASE) spectrum from a semiconductor optical amplifier (SOA) is studied theoretically and experimentally.The effect of facet reflectivity on the bandwidth and flatness of the ASE spectrum is investigated,and it is found that an improper antireflection coating narrows the bandwidth of the ASE spectrum.For an SOA with an active region with a wide material gain spectrum,an optimal antireflection coating helps to realize an SOA-based incoherent optical source with a high bandwidth and good flatness.

We propose a novel SiGe resonant-cavity-enhanced photodetector that operates at 1.3μm.The device is composed of two Bragg reflectors and a waveguide absorption region.Compared to conventional waveguide photodetectors,the device can be designed with a small enough area for high-speed operation.The limitation of the SiGe critical thickness is circumvented, and the photodetector is expected to have high quantum efficiency.The structure is optimized through numerical simulation and a quantum efficiency of 20% is expected with a 7.6μm-long waveguide.

The dependence of the coupling efficiencies of the TO-packaged VCSELs on packaging operation errors are analyzed using FRESNEL and MATLAB.Three error sources are considered: lateral offset of chips,tilt of chips,and tilt of the TO-cap.Of these three error sources, it is found that the tilt of the TO-cap has the greatest effect on the coupling efficiency of the packaging subassemblies.

In the design of current-mode PWM DC-DC converters,the slope compensation method widely used to prevent sub-harmonic oscillation can significantly weaken the load capacity under a high duty cycle.The method presented in this paper reduces the slope compensation effect on the maximum inductor current.The inductor current can reach a high value even if the duty cycle is high.The load capacity is improved significantly.In the implementation,a novel multiplex comparator is used to realize the functions of three conventional comparators and some logic circuits.The power dissipation is as low as that of a conventional comparator.The circuit is concise and simple to implement.

This paper presents an implantable amplifier for neural signal recording with cuff electrodes in CSMC 0.6μm CMOS technology.The amplifier consists of a low-noise preamplifier stage,a current-mode instrumentation amplifier stage,a buffer stage,and a constant-gm bias stage.The supply voltage is 2.5/±1.25V, and the power consumption is 180μW.In implementing an implanted neural signal detector extra components can be avoided by using novel techniques.According to the neural signal spectrum,the pass-band of the amplifier is set to 59Hz～12.8kHz and the mid-band gain is 80dB.Measurements of the amplifer’s time domain performance are in agreement with the design.From the measurements, further ways to improve are determined.

An ultrasensitive resonant cantilever sensor with a mass-resolution of tens of femtograms is developed for application in an air environment with a piezoresistive bridge and a metal coil integrated on the same cantilever.To improve mass-resolution,an optimized clip-style Al loop is fabricated on the cantilever especially for the 2nd flexural resonance mode.Such excitation provides two-point driving forces that match the 2nd mode shape-function of the cantilever deflection.In air,the resonant cantilever in the 2nd mode with the clip-style excitation shows a significantly increased quality factor of 857,while the 1st mode cantilever excited by conventional excitation shows a quality factor of 195.A closed-loop feedback circuit is developed to maintain the cantilever’s resonant in self-oscillation.By using Allen variance analysis,the resolution of the resonant sensor in air is improved from 0.17pg to 0.029pg by optimized excitation for the 2nd mode,and the resolution of 4 vaccinia viruses is achieved.

A novel video-rate adaptive equalizer IC that reduces the effect of multi-path signal echoes (ghosts),is described.An adaptive algorithm is used to dramatically improve the quality of the received image.The device,whose internal 576-tap digital filter eliminates artifacts that result from multi-path echoes,performs all the functions required for ghost cancellation and comprises DSP controllers,memory,syn detection,D/A converters,A/D converters,and user programming.The device is encapsulated in an 80-pin QFP,and the active area (PADs including) is 14mm×20mm in a 0.35μm CMOS process. It operates with a 3.3V power supply and dissipates 1.3W at the rate of 14.318MHz.

An ultra-low power CMOS voltage reference circuit is presented.To find the loop parameters of the op-amp and the core circuit,different techniques called loop gain and return ratio are applied,respectively.Fabricated in an SMIC 0.18μ CMOS process,the chip generates a reference voltage of 0.4V in a power supply range of 0.6～1.5V with a maximum temperature coefficient of 80ppm/℃.The total current is 4.8μA and the chip area (not including the PAD) is 0.045mm2.