| Citation: |
Song Limei, Li Hua, Du Huan, Xia Yang, Han Zhengsheng. Development of High Voltage pMOS Devices[J]. Journal of Semiconductors, 2006, 27(S1): 275-278.
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Song L M, Li H, Du H, Xia Y, Han Z S. Development of High Voltage pMOS Devices[J]. Chin. J. Semicond., 2006, 27(13): 275.
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Development of High Voltage pMOS Devices
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Abstract
A high voltage pMOSFET (HVpMOS) applied for 100V high voltage integrated circuit is designed and successfully fabricated based on the standard 0.8μm CMOS technology developed by the Institute of Microelectronics,Chinese Academy of Sciences.The breakdown voltage of the HVpMOS is -158V,and the output current reaches about 17mA for the device with W/L=100μm/2μm when gate bias is -100V.Experiment results demonstrate that the HVpMOS devices can work safely at an operation voltage of 100V.-
Keywords:
- HVIC,
- LDMOS,
- thick gate oxide
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References
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Proportional views
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