J. Semicond. > 2012, Volume 33 > Issue 7 > Article Number: 075003

A 20-GHz ultra-high-speed InP DHBT comparator

Huang Zhenxing , Zhou Lei , Su Yongbo and Jin Zhi

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Abstract: An ultra-high-speed, master-slave voltage comparator circuit is designed and fabricated using InP/GaInAs double heterojunction bipolar transistor technology with a current gain cutoff frequency of 170 GHz. The complete chip die, including bondpads, is 0.75 × 1.04 mm2. It consumes 440 mW from a single --4 V power supply, excluding the clock part. 77 DHBTs have been used in the monolithic comparator. A full Nyquist test has been performed up to 20 GHz, with the input sensitivity varying from 6 mV at 10 GHz to 16 mV at 20 GHz. To our knowledge, this is the first InP based integrated circuit including more than 70 DHBTs, and it achieves the highest sampling rate found on the mainland of China.

Key words: InPcomparatorHBTemitter coupled logiclatched comparatorsensitivity

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Huang Z X, Zhou L, Su Y B, Jin Z. A 20-GHz ultra-high-speed InP DHBT comparator[J]. J. Semicond., 2012, 33(7): 075003. doi: 10.1088/1674-4926/33/7/075003.

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History

Manuscript received: 20 August 2015 Manuscript revised: 26 March 2012 Online: Published: 01 July 2012

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