J. Semicond. > Volume 36 > Issue 12 > Article Number: 124005

Modeling of current-voltage characteristics for dual-gate amorphous silicon thin-film transistors considering deep Gaussian density-of-state distribution

Jian Qin 1, 2, and Ruohe Yao 1, ,

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Abstract: Accounting for the deep Gaussian and tail exponential distribution of the density of states, a physical approximation for potentials of amorphous silicon thin-film transistors using a symmetric dual gate(sDG a-Si:H TFT) has been presented. The proposed scheme provides a complete solution of the potentials at the surface and center of the layer without solving any transcendental equations. A channel current model incorporating features of gate voltage-dependent mobility and coupling factor is derived. We show the parameters required for accurately describing the current-voltage(I-V) characteristics of DG a-Si:H TFT and just how sensitively these parameters affect TFT current. Particularly, the parameters' dependence on the I-V characteristics with respect to the density of deep state and channel thickness has been investigated in detail. The resulting scheme and model are successively verified through comparison with numerical simulations as well as the available experimental data.

Key words: amorphous silicon thin-film transistordual gatesurface potentialdensity of statesGaussian deep statesdrain current

Abstract: Accounting for the deep Gaussian and tail exponential distribution of the density of states, a physical approximation for potentials of amorphous silicon thin-film transistors using a symmetric dual gate(sDG a-Si:H TFT) has been presented. The proposed scheme provides a complete solution of the potentials at the surface and center of the layer without solving any transcendental equations. A channel current model incorporating features of gate voltage-dependent mobility and coupling factor is derived. We show the parameters required for accurately describing the current-voltage(I-V) characteristics of DG a-Si:H TFT and just how sensitively these parameters affect TFT current. Particularly, the parameters' dependence on the I-V characteristics with respect to the density of deep state and channel thickness has been investigated in detail. The resulting scheme and model are successively verified through comparison with numerical simulations as well as the available experimental data.

Key words: amorphous silicon thin-film transistordual gatesurface potentialdensity of statesGaussian deep statesdrain current



References:

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Indluru A, Alford T L. High-temperature stability and enhanced performance of a-Si:H TFT on flexible substrate due to improved interface quality[J]. IEEE Trans Electron Devices, 2010, 57(11): 3006.

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Geonwook Y, Radtke D, Gwanghyeon B. Electrical instability of the a-Si:H TFTs fabricated by maskless laser-write lithography on a spherical surface[J]. IEEE Trans Electron Devices, 2011, 58(1): 160.

[3]

Servati P, Karim K S, Nathan A. Static characteristics of a-Si:H dual-gate TFTs[J]. IEEE Trans Electron Devices, 2003, 50(4): 926.

[4]

Moon K H, Cho Y S, Choi H. Characteristics of amorphous silicon dual-gate thin film transistor using back gate of pixel electrode for liquid crystal display driver[J]. Jpn J Appl Phys, 2009, 48(3): 03B.

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Takechi K, Nakata M, Azuma K. Dual-gate characteristics of amorphous InGaZnO thin-film transistors as compared to those of hydrogenated amorphous silicon thin-film transistors[J]. IEEE Trans Electron Devices, 2009, 56(9): 2027.

[6]

Dubey S, Tiwari P K, Jit S. On-current modeling of short-channel double-gate(DG) MOSFETs with a vertical Gaussian-like doping profile[J]. Journal of Semiconductors, 2013, 34(5): 054001.

[7]

Nathan A, Kumar A, Sakariya K. Amorphous silicon thin film transistor circuit integration for organic LED displays on glass and plastic[J]. IEEE J Solid-State Circuits, 2004, 39(9): 1477.

[8]

Huang J, Deng W, Zheng X. A compact model for undoped symmetric double-gate polysilicon thin-film transistors[J]. IEEE Trans Electron Devices, 2010, 57(10): 2607.

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He H, Zheng X. Analytical drain current model for amorphous IGZO thin-film transistors in above-threshold regime[J]. Journal of Semiconductors, 2011, 32: 074004.

[10]

Taur Y, Liang X, Wang W. A continuous, analytic drain-current model for DG MOSFETs[J]. IEEE Electron Device Lett, 2004, 25(2): 107.

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Ortiz-Conde A, García Sánchez F J, Muci J. Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs[J]. Solid-State Electron, 2005, 49(4): 640.

[12]

Longeaud C, Ventosinos F, Schmidt J A. Determination of hydrogenated amorphous silicon electronic transport parameters and density of states using several photoconductivity techniques[J]. J Appl Phys, 2012, 112(2): 023709.

[13]

Lee M, Tai C W, Huang J J. Correlation between gap state density and bias stress reliability of nanocrystalline TFTs comparing with hydrogenated amorphous silicon TFTs[J]. Solid-State Electron, 2013, 80: 72.

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Khakzar K, Lueder E H. Modeling of amorphous-silicon thin-film transistors for circuit simulations with SPICE[J]. IEEE Trans Electron Devices, 1992, 39(6): 1428.

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Shur M S, Jacunski M D, Slade H C. SPICE models for amorphous silicon and polysilicon thin film transistors[J]. Proceedings of Thin Film Transistor Technologies Ⅲ. San Antonio, TX:Electrochem. Soc, 1996.

[16]

Liu Y, Yao R H, Li B. A physical model based on surface potential for double-gate a-Si:H TFTs[J]. IEEE International Conference of Electron Devices and Solid-State Circuits, 2009.

[17]

Qin J, Yao R H. A physics-based scheme for potentials of a-Si:H TFT with symmetric dual gate considering deep Gaussian DOS distribution[J]. Solid-State Electron, 2014, 95: 46.

[18]

Kuo Y. Thin film transistors-material and process[J]. In:Amorphous silicon thin film transistors. Vol. 1. Kluwer Academic Publishers, 2004.

[19]

Tuan H, Thompson M, Johnson N. Dual-gate a-Si:H thin film transistors[J]. IEEE Electron Device Lett, 1982, 3(12): 357.

[20]

Chen S S, Kuo J B. Analytical DC model for a-Si:H thin-film transistors using effective temperature approach[J]. Jpn J Appl Phys, Part 1(Regular Papers & Short Notes), 1994, 33(5A): 2494.

[21]

Francis P, Terao A, Flandre D. Modeling of ultrathin double-gate nMOS/SOI transistors[J]. IEEE Trans Electron Devices, 1994, 41(5): 715.

[22]

Ortiz-Conde A, Garcia Sanchez F, Guzman M. Exact analytical solution of channel surface potential as an explicit function of gate voltage in undoped-body MOSFETs using the Lambert W function and a threshold voltage definition therefrom[J]. Solid-State Electron, 2003, 47(11): 2067.

[23]

Liu Y, Yao R H, Li B. An analytical model based on surface potential for a-Si:H thin-film transistors[J]. Journal of Display Technology, 2008, 4(2): 180.

[24]

Pao H C, Sah C T. Effects of diffusion current on characteristics of metal-oxide(insulator)-semiconductor transistors[J]. Solid-State Electron, 1966, 9(10): 927.

[25]

Ortiz-Conde A, García-Sánchez F J. A rigorous classical solution for the drain current of doped symmetric double-gate MOSFETs[J]. IEEE Trans Electron Devices, 2012, 59(9): 2390.

[26]

[Online] http://mathworld. wolfram[J]. .

[27]

Tang Z, Park M S, Jin S H. Parameter extraction of short-channel a-Si:H TFT including self-heating effect and drain current nonsaturation[J]. IEEE Trans Electron Devices, 2010, 57(5): 1093.

[28]

Servati P, Striakhilev D, Nathan A. Above-threshold parameter extraction and modeling for amorphous silicon thin-film transistors[J]. IEEE Trans Electron Devices, 2003, 50(11): 2227.

[29]

MEDICI . Avant! Corp[J]. Huntington Beach, CA, User's Maunual, MEDICI:Two Dimensional Device Simulation Program, 2012.

[1]

Indluru A, Alford T L. High-temperature stability and enhanced performance of a-Si:H TFT on flexible substrate due to improved interface quality[J]. IEEE Trans Electron Devices, 2010, 57(11): 3006.

[2]

Geonwook Y, Radtke D, Gwanghyeon B. Electrical instability of the a-Si:H TFTs fabricated by maskless laser-write lithography on a spherical surface[J]. IEEE Trans Electron Devices, 2011, 58(1): 160.

[3]

Servati P, Karim K S, Nathan A. Static characteristics of a-Si:H dual-gate TFTs[J]. IEEE Trans Electron Devices, 2003, 50(4): 926.

[4]

Moon K H, Cho Y S, Choi H. Characteristics of amorphous silicon dual-gate thin film transistor using back gate of pixel electrode for liquid crystal display driver[J]. Jpn J Appl Phys, 2009, 48(3): 03B.

[5]

Takechi K, Nakata M, Azuma K. Dual-gate characteristics of amorphous InGaZnO thin-film transistors as compared to those of hydrogenated amorphous silicon thin-film transistors[J]. IEEE Trans Electron Devices, 2009, 56(9): 2027.

[6]

Dubey S, Tiwari P K, Jit S. On-current modeling of short-channel double-gate(DG) MOSFETs with a vertical Gaussian-like doping profile[J]. Journal of Semiconductors, 2013, 34(5): 054001.

[7]

Nathan A, Kumar A, Sakariya K. Amorphous silicon thin film transistor circuit integration for organic LED displays on glass and plastic[J]. IEEE J Solid-State Circuits, 2004, 39(9): 1477.

[8]

Huang J, Deng W, Zheng X. A compact model for undoped symmetric double-gate polysilicon thin-film transistors[J]. IEEE Trans Electron Devices, 2010, 57(10): 2607.

[9]

He H, Zheng X. Analytical drain current model for amorphous IGZO thin-film transistors in above-threshold regime[J]. Journal of Semiconductors, 2011, 32: 074004.

[10]

Taur Y, Liang X, Wang W. A continuous, analytic drain-current model for DG MOSFETs[J]. IEEE Electron Device Lett, 2004, 25(2): 107.

[11]

Ortiz-Conde A, García Sánchez F J, Muci J. Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs[J]. Solid-State Electron, 2005, 49(4): 640.

[12]

Longeaud C, Ventosinos F, Schmidt J A. Determination of hydrogenated amorphous silicon electronic transport parameters and density of states using several photoconductivity techniques[J]. J Appl Phys, 2012, 112(2): 023709.

[13]

Lee M, Tai C W, Huang J J. Correlation between gap state density and bias stress reliability of nanocrystalline TFTs comparing with hydrogenated amorphous silicon TFTs[J]. Solid-State Electron, 2013, 80: 72.

[14]

Khakzar K, Lueder E H. Modeling of amorphous-silicon thin-film transistors for circuit simulations with SPICE[J]. IEEE Trans Electron Devices, 1992, 39(6): 1428.

[15]

Shur M S, Jacunski M D, Slade H C. SPICE models for amorphous silicon and polysilicon thin film transistors[J]. Proceedings of Thin Film Transistor Technologies Ⅲ. San Antonio, TX:Electrochem. Soc, 1996.

[16]

Liu Y, Yao R H, Li B. A physical model based on surface potential for double-gate a-Si:H TFTs[J]. IEEE International Conference of Electron Devices and Solid-State Circuits, 2009.

[17]

Qin J, Yao R H. A physics-based scheme for potentials of a-Si:H TFT with symmetric dual gate considering deep Gaussian DOS distribution[J]. Solid-State Electron, 2014, 95: 46.

[18]

Kuo Y. Thin film transistors-material and process[J]. In:Amorphous silicon thin film transistors. Vol. 1. Kluwer Academic Publishers, 2004.

[19]

Tuan H, Thompson M, Johnson N. Dual-gate a-Si:H thin film transistors[J]. IEEE Electron Device Lett, 1982, 3(12): 357.

[20]

Chen S S, Kuo J B. Analytical DC model for a-Si:H thin-film transistors using effective temperature approach[J]. Jpn J Appl Phys, Part 1(Regular Papers & Short Notes), 1994, 33(5A): 2494.

[21]

Francis P, Terao A, Flandre D. Modeling of ultrathin double-gate nMOS/SOI transistors[J]. IEEE Trans Electron Devices, 1994, 41(5): 715.

[22]

Ortiz-Conde A, Garcia Sanchez F, Guzman M. Exact analytical solution of channel surface potential as an explicit function of gate voltage in undoped-body MOSFETs using the Lambert W function and a threshold voltage definition therefrom[J]. Solid-State Electron, 2003, 47(11): 2067.

[23]

Liu Y, Yao R H, Li B. An analytical model based on surface potential for a-Si:H thin-film transistors[J]. Journal of Display Technology, 2008, 4(2): 180.

[24]

Pao H C, Sah C T. Effects of diffusion current on characteristics of metal-oxide(insulator)-semiconductor transistors[J]. Solid-State Electron, 1966, 9(10): 927.

[25]

Ortiz-Conde A, García-Sánchez F J. A rigorous classical solution for the drain current of doped symmetric double-gate MOSFETs[J]. IEEE Trans Electron Devices, 2012, 59(9): 2390.

[26]

[Online] http://mathworld. wolfram[J]. .

[27]

Tang Z, Park M S, Jin S H. Parameter extraction of short-channel a-Si:H TFT including self-heating effect and drain current nonsaturation[J]. IEEE Trans Electron Devices, 2010, 57(5): 1093.

[28]

Servati P, Striakhilev D, Nathan A. Above-threshold parameter extraction and modeling for amorphous silicon thin-film transistors[J]. IEEE Trans Electron Devices, 2003, 50(11): 2227.

[29]

MEDICI . Avant! Corp[J]. Huntington Beach, CA, User's Maunual, MEDICI:Two Dimensional Device Simulation Program, 2012.

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J Qin, R H Yao. Modeling of current-voltage characteristics for dual-gate amorphous silicon thin-film transistors considering deep Gaussian density-of-state distribution[J]. J. Semicond., 2015, 36(12): 124005. doi: 10.1088/1674-4926/36/12/124005.

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Manuscript received: 21 May 2015 Manuscript revised: Online: Published: 01 December 2015

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