J. Semicond. > 2015, Volume 36 > Issue 12 > Article Number: 124006

Performance prediction of four-contact vertical Hall-devices using a conformal mapping technique

Yang Huang 1, , Yue Xu 1, 2, , and Yufeng Guo 1, 2,

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Abstract: Instead of the conventional design with five contacts in the sensor active area, innovative vertical Hall devices(VHDs) with four contacts and six contacts are asymmetrical in structural design but symmetrical in the current flow that can be well fit for the spinning current technique for offset elimination. In this article, a conformal mapping calculation method is used to predict the performance of asymmetrical VHD embedded in a deep n-well with four contacts. Furthermore, to make the calculation more accurate, the junction field effect is also involved into the conformal mapping method. The error between calculated and simulated results is less than 5% for the current-related sensitivity, and approximately 13% for the voltage-related sensitivity. This proves that such calculations can be used to predict the optimal structure of the vertical Hall-devices.

Key words: conformal mapping techniquevertical Hall devicegeometry factormagnetic sensitivity

Abstract: Instead of the conventional design with five contacts in the sensor active area, innovative vertical Hall devices(VHDs) with four contacts and six contacts are asymmetrical in structural design but symmetrical in the current flow that can be well fit for the spinning current technique for offset elimination. In this article, a conformal mapping calculation method is used to predict the performance of asymmetrical VHD embedded in a deep n-well with four contacts. Furthermore, to make the calculation more accurate, the junction field effect is also involved into the conformal mapping method. The error between calculated and simulated results is less than 5% for the current-related sensitivity, and approximately 13% for the voltage-related sensitivity. This proves that such calculations can be used to predict the optimal structure of the vertical Hall-devices.

Key words: conformal mapping techniquevertical Hall devicegeometry factormagnetic sensitivity



References:

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Madec M, Schell J, Kammerer J. Compact modeling of vertical Hall-effect devices:electrical behavior[J]. Analog Integrated Circuits and Signal Processing, 2013, 77(2): 213.

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Huang Haiyun, Wang Dejun, Li Wenbo. A simplified compact model of miniaturized cross-shaped CMOS integrated Hall devices[J]. Journal of Semiconductors, 2012, 33(8): 084005.

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Heidari H, Bonizzoni E, Gatti U. Analysis and modeling of four-folded vertical Hall devices in current domain[J]. 10th Conference on PhD Research in Microelectronics and Electronics(PRIME), 2014: 1.

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Jovanovic E, Pantic D, Pantic D. Simulation of vertical Hall sensor in high-voltage CMOS technology[J]. 6th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Service, 2003: 811.

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Besse P A, Schott C, Popovic R S. Analytical study of vertical Hall devices using an adapted conform mapping technique[J]. International Conference on Modeling and Simulation of Microsystems, 1998: 660.

[8]

Schurig E. Highly sensitive vertical Hall sensors in CMOS technology[J]. Lausanne, Switzerland:Swiss Federal Institute of Technology Lausanne(EPFL), 2005.

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Abramowitz M, Stegun I A. Handbook of mathematical functions[J]. New York:Dover Publications, 1965.

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Agarwal R P, Perera K, Pinelas S. An introduction to complex analysis[J]. Springer, US, 2011.

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Popoviæ R S. Hall-effect devices[J]. London:Institute of Physics Publishing, 2004.

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Demierre M, Radivoje P, Popovic S. Improvements of CMOS Hall microsystems and application for absolute angular position measurements[J]. Lausanne, Switzerland:Swiss Federal Institute of Technology Lausanne(EPFL), 2003.

[1]

Madec M, Schell J, Kammerer J. Compact modeling of vertical Hall-effect devices:electrical behavior[J]. Analog Integrated Circuits and Signal Processing, 2013, 77(2): 213.

[2]

Huang Haiyun, Wang Dejun, Li Wenbo. A simplified compact model of miniaturized cross-shaped CMOS integrated Hall devices[J]. Journal of Semiconductors, 2012, 33(8): 084005.

[3]

Heidari H, Bonizzoni E, Gatti U. Analysis and modeling of four-folded vertical Hall devices in current domain[J]. 10th Conference on PhD Research in Microelectronics and Electronics(PRIME), 2014: 1.

[4]

Sander C, Raz R, Ruther P. Fully symmetric vertical hall devices in CMOS technology[J]. IEEE Sensors Proceedings, 2013: 1.

[5]

Schurig E, Schott C, Besse P. 0.2 mT residual offset of CMOS integrated vertical Hall sensors[J]. Sensors and Actuators A:Physical, 2004, 110(1): 98.

[6]

Jovanovic E, Pantic D, Pantic D. Simulation of vertical Hall sensor in high-voltage CMOS technology[J]. 6th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Service, 2003: 811.

[7]

Besse P A, Schott C, Popovic R S. Analytical study of vertical Hall devices using an adapted conform mapping technique[J]. International Conference on Modeling and Simulation of Microsystems, 1998: 660.

[8]

Schurig E. Highly sensitive vertical Hall sensors in CMOS technology[J]. Lausanne, Switzerland:Swiss Federal Institute of Technology Lausanne(EPFL), 2005.

[9]

Abramowitz M, Stegun I A. Handbook of mathematical functions[J]. New York:Dover Publications, 1965.

[10]

Agarwal R P, Perera K, Pinelas S. An introduction to complex analysis[J]. Springer, US, 2011.

[11]

Popoviæ R S. Hall-effect devices[J]. London:Institute of Physics Publishing, 2004.

[12]

Demierre M, Radivoje P, Popovic S. Improvements of CMOS Hall microsystems and application for absolute angular position measurements[J]. Lausanne, Switzerland:Swiss Federal Institute of Technology Lausanne(EPFL), 2003.

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Y Huang, Y Xu, Y F Guo. Performance prediction of four-contact vertical Hall-devices using a conformal mapping technique[J]. J. Semicond., 2015, 36(12): 124006. doi: 10.1088/1674-4926/36/12/124006.

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Manuscript received: 16 April 2015 Manuscript revised: Online: Published: 01 December 2015

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