J. Semicond. > Volume 36 > Issue 12 > Article Number: 124003

Temperature dependent interfacial and electrical characteristics during atomic layer deposition and annealing of HfO2 films in p-GaAs metal-oxide-semiconductor capacitors

Chen Liu , Yuming Zhang , Yimen Zhang , Hongliang Lü , and Bin Lu

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Abstract: We have investigated the temperature dependent interfacial and electrical characteristics of p-GaAs metal-oxide-semiconductor capacitors during atomic layer deposition(ALD) and annealing of HfO2 using the tetrakis(ethylmethyl) amino hafnium precursor. The leakage current decreases with the increase of the ALD temperature and the lowest current is obtained at 300℃ as a result of the Frenkel-Poole conduction induced leakage current being greatly weakened by the reduction of interfacial oxides at the higher temperature. Post deposition annealing(PDA) at 500℃ after ALD at 300℃ leads to the lowest leakage current compared with other annealing temperatures. A pronounced reduction in As oxides during PDA at 500℃ has been observed using X-ray photoelectron spectroscopy at the interface resulting in a proportional increase in Ga2O3. The increment of Ga2O3 after PDA depends on the amount of residual As oxides after ALD. Thus, the ALD temperature plays an important role in determining the high-k/GaAs interface condition. Meanwhile, an optimum PDA temperature is essential for obtaining good dielectric properties.

Key words: GaAs metal-oxide-semiconductor capacitortemperatureinterfaceleakage current

Abstract: We have investigated the temperature dependent interfacial and electrical characteristics of p-GaAs metal-oxide-semiconductor capacitors during atomic layer deposition(ALD) and annealing of HfO2 using the tetrakis(ethylmethyl) amino hafnium precursor. The leakage current decreases with the increase of the ALD temperature and the lowest current is obtained at 300℃ as a result of the Frenkel-Poole conduction induced leakage current being greatly weakened by the reduction of interfacial oxides at the higher temperature. Post deposition annealing(PDA) at 500℃ after ALD at 300℃ leads to the lowest leakage current compared with other annealing temperatures. A pronounced reduction in As oxides during PDA at 500℃ has been observed using X-ray photoelectron spectroscopy at the interface resulting in a proportional increase in Ga2O3. The increment of Ga2O3 after PDA depends on the amount of residual As oxides after ALD. Thus, the ALD temperature plays an important role in determining the high-k/GaAs interface condition. Meanwhile, an optimum PDA temperature is essential for obtaining good dielectric properties.

Key words: GaAs metal-oxide-semiconductor capacitortemperatureinterfaceleakage current



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Liu C, Zhang Y M, Zhang Y M. Effect of atomic layer deposition growth temperature on the interfacial characteristics of HfO2/p-GaAs metal-oxide-semiconductor capacitors[J]. J Appl Phys, 2014, 116: 222207.

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Oh H, Lin J, Lee S. Study on interfacial properties of InGaAs and GaAs integrated with chemical-vapor-deposited high-k gate dielectrics using X-ray photoelectron spectroscopy[J]. Appl Phys Lett, 2008, 93: 062107.

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Gilmer D, Hegde R, Cotton R. Compatibility of polycrystalline silicon gate deposition with HfO2 and Al2O3/HfO2 gate dielectrics[J]. Appl Phys Lett, 2002, 81: 1288.

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Hackley J C, Demaree J D, Gougousi T. Growth and interface of HfO2 films on H-terminated Si from a TDMAH and H2O atomic layer deposition process[J]. J Vac Sci Technol A, 2008, 26: 1235.

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Hinkle C, Sonnet A, Milojevic M. Comparison of n-type and p-type GaAs oxide growth and its effects on frequency dispersion characteristics[J]. Appl Phys Lett, 2008, 93: 113506.

[32]

Thurmond C, Schwartz G, Kammlott G. GaAs oxidation and the Ga-As-O equilibrium phase diagram[J]. J Electrochem Soc, 1980, 127: 1366.

[1]

Yamasaki K, Asai K, Mizutani T. Self-align implantation for n+-layer technology(SAINT) for high-speed GaAs ICs[J]. Electron Lett, 1982, 18: 119.

[2]

Datta S, Dewey G, Fastenau J. Ultrahigh-speed 0.5 V supply voltage In0.7Ga0.3As quantum-well transistors on silicon substrate[J]. IEEE Electron Device Lett, 2007, 28: 685.

[3]

McMorrow D, Boos J B, Knudson A R. Charge-collection characteristics of low-power ultrahigh speed, metamorphic AlSb/InAs high-electron mobility transistors(HEMTs)[J]. IEEE Trans Nucl Sci, 2000, 47: 2662.

[4]

Del Alamo J A. Nanometre-scale electronics with Ⅲ-V compound semiconductors[J]. Nature, 2011, 479: 317.

[5]

Zhu S Y, Xu J P, Wang L S. Compare of interfacial and electrical properties between Al2O3 and ZnO as interfacial passivation layer of GaAs MOS device with HfTiO gate dielectric[J]. Journal of Semiconductors, 2015, 36: 034006.

[6]

Martens K, Wang W, De K K. Impact of weak Fermi-level pinning on the correct interpretation of Ⅲ-V MOS CV and GV characteristics[J]. Microelectron Eng, 2007, 84: 2146.

[7]

Liu C, Zhang Y M, Zhang Y M. Interfacial characteristics of Al/Al2O3/ZnO/n-GaAs MOS capacitor[J]. Chin Phys B, 2013, 22: 076701.

[8]

He G, Zhang L D, Liu M. HfO2-GaAs metal-oxide-semiconductor capacitor using dimethylaluminumhydride-derived aluminum oxynitride interfacial passivation layer[J]. Appl Phys Lett, 2010, 97: 062908.

[9]

Koveshnikov S, Tsai W, Ok I. Metal-oxide-semiconductor capacitors on GaAs with high-k gate oxide and amorphous silicon interface passivation layer[J]. Appl Phys Lett, 2006, 88: 022106.

[10]

Wieder H. Surface Fermi level of Ⅲ-V compound semiconductor-dielectric interfaces[J]. Surf Sci, 1983, 132: 390.

[11]

Robertson J. Model of interface states at Ⅲ-V oxide interfaces[J]. Appl Phys Lett, 2009, 94: 152104.

[12]

Passlack M, Hong M J. Quasistatic and high frequency capacitance-voltage characterization of Ga2O3-GaAs structures fabricated by in situ molecular beam epitaxy[J]. Appl Phys Lett, 1996, 68: 1099.

[13]

He G, Chen X S, Sun Z Q. Interface engineering and chemistry of Hf-based high-k dielectrics on Ⅲ-V substrates[J]. Surf Sci Rep, 2013, 68: 68.

[14]

He G, Liu J W, Chen H S. interface control and modification of band alignment and electrical properties of HfTiO/GaAs gate stacks by nitrogen incorporation[J]. J Mater Chem C, 2014, 2: 5299.

[15]

Roy K, Mukhopadhyay S H. Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits[J]. Proc IEEE, 2003, 91: 305.

[16]

Gao T Q, Zhang C, Chi B Y. Design and analysis of a highly-integrated CMOS power amplifier for RFID readers[J]. Journal of Semiconductors, 2009, 30: 065008.

[17]

Li X, Cao Y, Hall D. GaAs MOSFET using InAlP native oxide as gate dielectric[J]. IEEE Electron Device Lett, 2004, 25: 772.

[18]

Lin H C, Wang W E, Brammertz G. Electrical study of sulfur passivated In0.53Ga0.47As MOS capacitor and transistor with ALD Al2O3 as gate insulator[J]. Microelectron Eng, 2009, 86: 1554.

[19]

Liu C, Zhang Y M, Zhang Y M. Effect of atomic layer deposition growth temperature on the interfacial characteristics of HfO2/p-GaAs metal-oxide-semiconductor capacitors[J]. J Appl Phys, 2014, 116: 222207.

[20]

Aguirre T F, Milojevic M, Choi K. S passivation of GaAs and band bending reduction upon atomic layer deposition of HfO2/Al2O3 nanolaminates[J]. Appl Phys Lett, 2008, 93: 061907.

[21]

Bhattacharya M, Mukherjee M, Sanyal M. Energy dispersive X-ray reflectivity technique to study thermal properties of polymer films[J]. J Appl Phys, 2003, 94: 2882.

[22]

Milojevic M, Aguirre T F, Hinkle C. Half-cycle atomic layer deposition reaction studies of Al2O3 on In0.2Ga0.8As(100) surfaces[J]. Appl Phys Let, 2008(93): 202902.

[23]

Hinkle C, Milojevic M, Brennan B. Detection of Ga suboxides and their impact on Ⅲ-V passivation and Fermi-level pinning[J]. Appl Phys Lett, 2009, 94: 162101.

[24]

Miki H, Kunitomo M, Furukawa R. Leakage-current mechanism of a tantalum-pentoxide capacitor on rugged Si with a CVD-TiN plate electrode for high-density DRAMs[J]. Symposium VLSI Tech Dig, 1999: 99.

[25]

Dumin D, Maddux J R. Correlation of stress-induced leakage current in thin oxides with trap generation inside the oxides[J]. IEEE Trans Electron Devices, 1993, 40: 986.

[26]

Lee H D, Feng T, Yu L. Reduction of native oxides on GaAs during atomic layer growth of Al2O3[J]. Appl Phys Lett, 2009, 94: 222108.

[27]

Oh H, Lin J, Lee S. Study on interfacial properties of InGaAs and GaAs integrated with chemical-vapor-deposited high-k gate dielectrics using X-ray photoelectron spectroscopy[J]. Appl Phys Lett, 2008, 93: 062107.

[28]

Dalapati G K, Tong Y, Loh W Y. Electrical and interfacial characterization of atomic layer deposited high-k gate dielectrics on GaAs for advanced CMOS devices[J]. IEEE Trans Electron Devices, 2007, 54: 1831.

[29]

Gilmer D, Hegde R, Cotton R. Compatibility of polycrystalline silicon gate deposition with HfO2 and Al2O3/HfO2 gate dielectrics[J]. Appl Phys Lett, 2002, 81: 1288.

[30]

Hackley J C, Demaree J D, Gougousi T. Growth and interface of HfO2 films on H-terminated Si from a TDMAH and H2O atomic layer deposition process[J]. J Vac Sci Technol A, 2008, 26: 1235.

[31]

Hinkle C, Sonnet A, Milojevic M. Comparison of n-type and p-type GaAs oxide growth and its effects on frequency dispersion characteristics[J]. Appl Phys Lett, 2008, 93: 113506.

[32]

Thurmond C, Schwartz G, Kammlott G. GaAs oxidation and the Ga-As-O equilibrium phase diagram[J]. J Electrochem Soc, 1980, 127: 1366.

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C Liu, Y M Zhang, Y M Zhang, H Lü, B Lu. Temperature dependent interfacial and electrical characteristics during atomic layer deposition and annealing of HfO2 films in p-GaAs metal-oxide-semiconductor capacitors[J]. J. Semicond., 2015, 36(12): 124003. doi: 10.1088/1674-4926/36/12/124003.

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Manuscript received: 26 April 2015 Manuscript revised: Online: Published: 01 December 2015

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