Xiao Li received his BS degrees in state key laboratory of chemical engineering from East China University of Science technology, MS degrees in state key laboratory of luminescent materials and devices from South China University of technology. Now, he is a PhD student at Peking University under the supervision of prof. Lei Lu. His research focus on thin-film transistors and flexible display.
Shengdong Zhang received his BS and MS degrees in Electronic Engineering from Southeast University, and his PhD degree in Microelectronics from Peking University. In 2002, he joined School of Electronics Engineering and Computer Science at Peking University. He is currently a professor in School of Electronic and Computer Engineering at Peking University Shenzhen Graduate School. His research interests include integrated circuit design, thin-film transistors and flexible display.
Lei Lu received his BS and MS degrees in Microelectronics from Soochow University, and his PhD degree in Electronic and Computer Engineering from the Hong Kong University of Science and Technology, he worked at the Hong Kong University of Science and Technology from 2015 to 2019, and joined School of Electronic and Computer Engineering at Peking University Shenzhen Graduate School in 2019, where he is now an assistant professor. His research interests include semiconductor devices, advanced display technology and flexible electronics.1. Introduction
Since the first amorphous indium−gallium−zinc oxide (a-IGZO) thin-film transistor (TFT) was proposed in 2004[1], considerable efforts have been made to exploit its exceptional advantages, such as low off-state current, relatively high field-effect mobility, good large-area uniformity, and low processing temperature. Oxide semiconductor (OS) TFTs have achieved impressive success in flat-panel displays[2, 3] and have recently piqued interest in the growing studies on OS-based flexible electronics and 3D integrated circuits (3DIC). However, the mobility of incumbent IGZO TFT is only about 10 cm2·V−1·s−1, far below the demand of these cutting-edge applications, such as next-generation micro-light-emitting diode (Micro-LED) display and memory-in-computing 3DIC. Although noticeably high mobility can be readily achieved in OSs with higher indium content, these cation-modulated high-mobility OSs often suffer poor stability due to uncontrollable native defects. A more eclectic method is revealed to combine the low- and high-mobility OSs in a bilayer heterojunction channel[4−8]. The diversified mobility-boosting efficiencies are normally attributed to the modified defect distribution along channel depth[9] or the two-dimensional electron gas (2DEG) at the heterojunction interface[10, 11], while the dominant carrier transport mechanism is still controversial in heterojunction OS TFTs, obscuring the developing avenue of high-mobility OS TFT.
Common heterojunction OS channels often consist of OSs with different metals[5−11], while the inevitable interdiffusion of distinct cations would readily blur the heterojunction interface and also introduce complicated defect types[11]. In this study, the carrier transportation in the heterojunction OS channel was investigated by employing the relatively high-mobility InZnO layers[12−14] with different zinc contents in an elevated-metal metal-oxide (EMMO) architecture[15, 16]. Thus, the cation-related defect types should be identical within the InZnO bilayer channel, and the unique post-oxidizing annealing of EMMO TFT can furthest suppress the oxygen-related channel defects. The influences of heterojunction band diagram and gate field on the carrier transport properties were systematically investigated in such defect-regulated channels, revealing the mechanism and limitations of heterojunction on mobility boosting.
2. Experiment
In this work, the bilayer channel was implemented using the amorphous InZnO layers with cation atomic ratios of In : Zn = 1 : 1 at.% and 1 : 3 at.%, respectively named IZO1:1 and IZO1:3. The formation of quantum well at the OS heterojunction interface is closely related to the conduction band (EC) offset between OS layers[17−20]. Hence, we firstly investigated the basic energy band structures of IZO1:1 and IZO1:3 layers. The Fermi level (EF), along with the values of EF − EV, were measured by the ultraviolet photoelectron spectroscopy (UPS), as shown in Figs. 1(a) and 1(b). The EF of IZO1:1 and IZO1:3 are −3.99 and −4.24 eV, and the EF − EV of the two layers are 3.56 and 3.17 eV, respectively. The band gaps (Eg) of IZO1:1 and IZO1:3 were extracted to be 3.28 and 3.74 eV respectively, as shown in Fig. 1(c). Based on the above results, the energy band structures of IZO1:1 and IZO1:3 can be depicted, as illustrated in Fig. 1(d). The EC of IZO1:3 is 0.32 eV higher than that of IZO1:1, suggesting the EC of IZO increases with the increase of Zn content, which is consistent with the previous study on ZnGaO system[21]. Consequently, the large EC offset between IZO1:1 and IZO1:3 is expected to form a quantum well at the heterojunction interface, as plotted in Fig. 1(d).
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As shown in Fig. 1(e), TFTs with heterojunction channel of IZO1:1 and IZO1:3 were fabricated with the EMMO structure. First, a 100 nm thick molybdenum gate layer was prepared on the glass substrate by sputtering, and it was patterned by lithography. Then, a 100-nm-thick layer of SiO2 was deposited as a gate insulator (GI) by the plasma-enhanced chemical vapor deposition (PECVD). Afterward, the heterojunction channels constituted of 15-nm-thick InZnO1:1 and 15-nm-thick InZnO1:3 were successively prepared in the mixed atmosphere of 29 sccm argon (Ar) and 5 sccm oxygen (O2) by using ceramic targets with chemical compositions respectively of In2O3 : ZnO = 1 : 2 mol% and In2O3 : ZnO = 1 : 6 mol% at room temperature. Next, the heterojunction channel was annealed at 350 °C for 1 h in an O2 atmosphere, and then patterned by the wet etchant. After the bilayer channel is further oxidized using the nitrous oxide (N2O) plasma, a 200-nm-thick layer of PECVD SiO2 was deposited as a passivation layer. Then, contact holes for the bottom gate and source/drain (S/D) were opened using reactive ion etching (RIE). Next, a 100-nm Mo/50-nm Al bilayer was sputtered and patterned to form electrodes. During the final anneal at 400 °C for 2 h in O2 atmosphere, the donor defect-populated n+-S/D was formed in the OS regions sealed the gas-permeable metallic electrodes. Simultaneously, the channel defects, such as VO and Mi, were thermally annihilated by these O2 species diffusing through the permeable SiO2 passivation layer in to OS channel region[15, 16]. The furthest annihilation of oxygen-related channel defects minimizes the possible contributions of native defects to electron mobility[9]. For comparison, single-layer channel TFTs with IZO1:1 and IZO1:3 were fabricated using the aforementioned process flow, and channel thickness is maintained to be 30-nm thick.
The electrical characteristics of TFTs and C−V curve were measured by a semiconductor parameter analyzer (Agilent B1500). The characteristics of IZO1:1 and IZO1:3 films (15 nm, annealed at 400 °C for 2 h) were determined by UPS (Thermo K-ALPHA+) and ultraviolet−visible spectrophotometer (Shimadzu UV-2700)
3. Results and discussion
3.1 Heterojunction-induced mobility enhancement
The transfer curves of the IZO1:1, IZO1:3, and IZO1:1/IZO1:3 heterojunction TFT with channel length (L) and width (W) of 100 and 100 µm are shown in Fig. 2(a). Since the threshold voltage (Vth) highly depends on the channel carrier concentration, a more negative Vth of OS TFT often reflects a larger population of channel donor defects[22, 23]. Moreover, the percolation conduction mechanism in OS TFTs further correlates the higher channel carrier concentration with the higher mobility[24]. Herein, the Vth is defined by the gate voltage at L/W-normalized ID = 10−9 A at VDS of 0.1 V and extracted to be −13.5, 1.5, and −6.5 V, respectively for IZO1:1, IZO1:3, and IZO1:1/IZO1:3 TFTs. As expected, a larger In:Zn ratio gives rise to higher channel defect and carrier concentrations[25, 26]. The moderate Vth of heterojunction TFT is thus consistent with the medium cation ratio of the bilayer channel. In contrast, the on-sate current and thus mobility of the bilayer TFT are noticeably higher than those of single-layer TFTs, hinting at an additional conduction mechanism in the bilayer channel.
The linear field-effect mobility (μlin) is given as:
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μlin=LWCoxVDS(∂ID∂VG). |
(1) |
Here Cox is the areal capacitance of GI, and the drain-to-source voltage (VDS) is 0.1 V. As shown in Fig. 2(b), the single layer IZO1:1 and IZO1:3 TFT exhibited a μlin of 31.5 and 22.1 cm2·V−1·s−1, respectively. Impressively, the μlin of IZO1:1/IZO1:3 heterojunction TFT is up to 84.3 cm2·V−1·s−1, which is about four times higher than the mobility of IZO1:3 TFT and nearly triple that of IZO1:1 TFT. Considering the moderate defect and carrier concentrations in bilayer channel, a quantum well is most plausibly formed to supply a 2DEG path of higher mobility[10, 17, 27, 28].
To verify this supposition, we fabricated a metal−insulator−semiconductor (MIS) device to directly evaluate the carrier distribution across the IZO1:1/IZO1:3 heterojunction. Compared with bilayer channel, the thickness of IZO1:1 layer is maintained to be 15 nm, while the thickness of IZO1:3 is increased to 115 nm to avoid the undesired electron injection. The electron concentration (NC−V) depth profile is extracted from C−V curve by the following equations[29]:
|
X(V)=Aεε0(1C−1Cox). |
(2) |
|
NC−V=−2qεε0A2∂(C−2)∂V. |
(3) |
Here, X is the heterojunction depth, C is the measured capacitance as a function of voltage, ε is the permittivity of semiconductor, ε0 is the dielectric constant of vacuum, A is the active area and q is the electron charge. As shown in Fig. 3(a), the C−V curve of the heterojunction MIS device exhibits a noticeable mutation of slope. As further analyzed in the NC−V−X curve (Fig. 3(b)), a surge of NC−V is observed near the IZO1:1/IZO1:3 interface, corresponding to the 2DEG. More specifically, the 2DEG quantum well is found to be located at the IZO1:1 side, consistent with the calculated band diagram in Fig. 1(d). Therefore, the high-mobility 2DEG conduction path is attributed to the heterojunction interface formed by the modulation of zinc content.
Besides the significantly boosted mobility, the heterojunction TFT exhibits a more complicated VG dependence of μlin, distinct from the gradually saturated μlin along with the VG increasing in IZO1:1 and IZO1:3 TFTs. This points out that the gate field does not only induct channel electrons, but also influences the 2DEG transport at the heterojunction interface. As shown in Fig. 2(b), the μlin gradually rises up with the VG increasing in the relatively low-VG (LV) realm, while the μlin finally encounters an abrupt drop in the high-VG (HV) range. A similar transition has been observed in heterojunction OS TFTs[9, 17, 30]. A high enough gate field in the opposite direction to the built-in electric field of heterojunction would weaken the quantum well and thus gradually shift the carrier transport from the 2DEG path to the conventional channel/GI interface[30]. This emphasizes the importance of band diagram engineering in the heterojunction OS TFTs.
3.2 Influence of heterojunction band diagram
To further investigate the influence of heterojunction band diagram, IZO1:1 and IZO1:3 were reversely stacked to form the IZO1:3/IZO1:1 heterojunction (inverted heterojunction) TFT. As compared in Fig. 4(a), the transfer curves of heterojunction and inverted heterojunction TFTs unsurprisingly have the roughly similar Vth, since both channels have similar populations of channel defects and carriers. Drastic differences are observed in the μlin−VG curves in Fig. 4(b). In the AB and ab segments (subthreshold regions), the mobility similarly increases with the increasing VG, since the subthreshold thermal emission current is determined by the VG-modulated source barrier[31].
As shown in Fig. 4(b), heterojunction and inverted heterojunction TFTs exhibit completely different dependences of μlin on VG. As illustrated in Figs. 4(c) and 4(d), for BC segment of heterojunction TFT, the LV gate field is in the opposite direction to the build-in electric potential and tends to attract the electrons away from the heterojunction interface, while the 2DEG is still confined in the heterojunction quantum well. This results in weakened collisions between electrons and interface defects[32], such as the strongly ionized oxygen vacancy (VO2+) due to extreme band bending[33]. In contrast, the inelastic collision of 2DEG with interface defects in the inverted heterojunction TFT is synergistically enhanced by the built-in electric field and LV gate field, causing a noticeably degraded mobility in the bc segment in Fig. 4(b).
When the gate electric field increases finally to surpass the built-in electric potential in the heterojunction TFT, the 2DEG is gradually pulled out from the suppressed quantum well to the conventional GI/IZO1:1 interface, as illustrated in Fig. 4(e). This results in the abrupt mobility drop in the CD segments in Fig. 4(b). However, the band offset between IZO1:3 and IZO1:1 layers is large enough to form a high built-in potential at the heterojunction and thus ensures a relatively large operation voltage window of 2DEG-enhanced conduction[30]. As for the cd segment, the percolation conduction dominates the electron transport, which is responsible for the increase of mobility to about the same as the mobility of single-layer IZO1:1 channel (about 30 cm2·V−1·s−1).
4. Conclusion
We have successfully fabricated the high-performance heterojunction InZnO TFTs in the EMMO architecture of inherently low channel defects. The cation ratio-modulated bilayer channel can effectively form high-concentration 2DEG in the interface quantum well. The mobility-boosting capability of 2DEG was found to highly depend on the alignment between the external gate field and the quantum well built-in field, originating from the field-dependent interface collision of 2DEG. Moreover, the VG operation window of such mobility enhancement derives from the competition between these two fields. This work emphasizes the underlying relation between heterojunction band diagram and layer stacking sequence in bilayer OS TFTs. Specifically, we propose that the OS layer with a lower Fermi level can be adjacent to gate insulator to furthest explore the mobility-boosting potential of OS heterojunction channel.
Acknowledgments
This work was implemented in the Guangdong Technology Center for Oxide Semiconductor Devices and ICs, Guangdong Provincial Key Laboratory of In-Memory Computing Chips, and Shenzhen POC Center of Flexible Electronics.
This work was supported by National Key Research and Development Program (2021YFB3600802)，Shenzhen Municipal Scientific Program (JSGG20220831103803007, SGDX20211123145404006)，Guangdong Basic and Applied Basic Research Foundation (2022A1515110029).
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