J. Semicond. > 2013, Volume 34 > Issue 3 > 035001
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SEMICONDUCTOR INTEGRATED CIRCUITS

A digitally calibrated CMOS RMS power detector for RF automatic gain control

Taotao Yan, Hui Wang, Jinbo Li and Jianjun Zhou

+ Author Affiliations

 Corresponding author: Yan Taotao, Email:yantaotao@ic.sjtu.edu.cn

DOI: 10.1088/1674-4926/34/3/035001

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Abstract: This paper presents the design and implementation of a digitally calibrated CMOS wideband radio frequency (RF) root-mean-square (RMS) power detector for high accuracy RF automatic gain control (AGC). The proposed RMS power detector demonstrates accurate power detection in the presence of process, supply voltage, and temperature (PVT) variations by employing a digital calibration scheme. It also consumes low power and occupies a small chip area. The measurement results show that the scheme improves the accuracy of the detector to better than 0.3 dB over the PVT variations and wide operating frequency range from 0.2 to 0.8 GHz. Implemented in a 0.18 μm CMOS process and occupying a small die area of 263×214 μm2, the proposed digitally calibrated CMOS RMS power detector only consumes 1.6 mA in power detection mode and 2.1 mA in digital calibration mode from a 1.8 V supply voltage.

Key words: automatic gain control, digital calibration, radio-frequency, RMS power detector



[1]
Antoine P, Bauser P, Beaulaton H, et al. A direct-conversion receiver for DVB-H. IEEE J Solid-State Circuits, 2005, 40(12):2536 doi: 10.1109/JSSC.2005.857429
[2]
Lerstaveesin S, Gupta M, Kang D, et al. A 48-860 MHz CMOS low-IF direct-conversion DTV tuner. IEEE J Solid-State Circuits, 2008, 43(9):2013 doi: 10.1109/JSSC.2008.2001900
[3]
Mehr I, Rose S, Nesterenko S, et al. A dual-conversion tuner for multi-standard terrestrial and cable reception. Symposium on VLSI Circuits, 2005:340 http://ieeexplore.ieee.org/document/1469400/authors
[4]
Womac M, Deiss A, Davis T, et al. Dual-band single-ended-input direct-conversion DVB-H receiver. ISSCC Dig Tech Papers, 2006:2514 http://ieeexplore.ieee.org/document/1696316/?arnumber=1696316
[5]
Kim B, Kim T W, Cho Y, et al. A 100 mW dual-band CMOS mobile-TV tuner IC for T-DMB/DAB and ISDB-T. ISSCC Dig Tech Papers, 2006:2534 http://ieeexplore.ieee.org/document/1696318/keywords
[6]
Stevenson J M, Hisayasu P, Deiss A, et al. A multi-standard analog and digital TV tuner for cable and terrestrial applications. ISSCC Dig Tech Papers, 2007:210 http://ieeexplore.ieee.org/document/4242339/
[7]
Meyer R G. Low-power monolithic RF peak detector analysis. IEEE J Solid-State Circuits, 1995, 30(1):65 doi: 10.1109/4.350192
[8]
Milanovic V, Gaitan M, Marshall J C, et al. CMOS foundry implementation of Schottky diodes for RF detection. IEEE Trans Electron Devices, 1996, 43(12):2210 doi: 10.1109/16.544393
[9]
Yin Q, Eisenstadt W R, Fox R M, et al. A translinear RMS detector for embedded test of RF ICs. IEEE Trans Instrumentation and Measurement, 2005, 54(5):1708 doi: 10.1109/TIM.2005.855105
[10]
Winter S M, Ehm H J, Koelpin A, et al. Diode power detector DC operating point in six-port communications receivers. 37th European Microwave Conference, 2007:795 http://ieeexplore.ieee.org/document/4405312/
[11]
Yamamoto K, Miyashita M, Kurusu H, et al. A current-mirror-based GaAs-HBT RF power detector for wireless applications. ICSICT, 2007:1 http://ieeexplore.ieee.org/document/4384432/?arnumber=4384432&contentType=Conference%20Publications
[12]
Gorisse J, Cathelin A, Kaiser A, et al. A 60 GHz 65 nm CMOS RMS power detector for antenna impedance mismatch detection. ESSCIRC, 2009:172
[13]
Ho S. A 450 MHz CMOS RF power detector. IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2001:209 http://ieeexplore.ieee.org/document/935677/
[14]
Kouwenhoven M, Staveren A V. A 2 GHz mean-square power detector with integrated offset chopper. IEEE Intel Solid-State Circuits Conference Digest of Technical Papers, 2005:124 http://ieeexplore.ieee.org/document/1493900/?reload=true&arnumber=1493900&contentType=Conference%20Publications
[15]
Dai Y, Han K, Yan N, et al. A high dynamic range linear RF power detector with a preceding LNA. Journal of Semiconductors, 2012, 33(1):015005 doi: 10.1088/1674-4926/33/1/015005
Fig. 1.  Block diagram of a typical RF AGC loop.

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Fig. 2.  Block diagram of the digitally calibrated RMS power detector.

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Fig. 3.  The flow chart of the proposed digital calibration.

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Fig. 4.  Core schematic of the RMS power detector.

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Fig. 5.  Schematic of the current source array.

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Fig. 6.  Die photograph of the proposed power detector.

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Fig. 7.  Measured transient response of the power detector output voltage during digital calibration (Clock Freq. $=$ 100 kHz).

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Fig. 8.  Monter carlo simulation for detecting errors before and after digital calibration at different temperatures ($-40$ ℃, 40 ℃, 110 ℃).

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Fig. 9.  Measured power detector output voltage for -15 dBm input RF power before and after digital calibration.

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Fig. 10.  Measured power detector input RF power for 900 mV output voltage before and after calibration.

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Fig. 11.  Measured power detector input RF power for 900 mV output voltage before and after calibration versus supply voltage.

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Fig. 12.  Measured power detector input RF power for 900 mV output voltage before and after calibration versus temperature.

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Fig. 13.  Measured power detector input RF power for 900 mV output voltage after calibration versus input frequency.

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Table 1.   Summary of performance measurements and comparison.
[1]
Antoine P, Bauser P, Beaulaton H, et al. A direct-conversion receiver for DVB-H. IEEE J Solid-State Circuits, 2005, 40(12):2536 doi: 10.1109/JSSC.2005.857429
[2]
Lerstaveesin S, Gupta M, Kang D, et al. A 48-860 MHz CMOS low-IF direct-conversion DTV tuner. IEEE J Solid-State Circuits, 2008, 43(9):2013 doi: 10.1109/JSSC.2008.2001900
[3]
Mehr I, Rose S, Nesterenko S, et al. A dual-conversion tuner for multi-standard terrestrial and cable reception. Symposium on VLSI Circuits, 2005:340 http://ieeexplore.ieee.org/document/1469400/authors
[4]
Womac M, Deiss A, Davis T, et al. Dual-band single-ended-input direct-conversion DVB-H receiver. ISSCC Dig Tech Papers, 2006:2514 http://ieeexplore.ieee.org/document/1696316/?arnumber=1696316
[5]
Kim B, Kim T W, Cho Y, et al. A 100 mW dual-band CMOS mobile-TV tuner IC for T-DMB/DAB and ISDB-T. ISSCC Dig Tech Papers, 2006:2534 http://ieeexplore.ieee.org/document/1696318/keywords
[6]
Stevenson J M, Hisayasu P, Deiss A, et al. A multi-standard analog and digital TV tuner for cable and terrestrial applications. ISSCC Dig Tech Papers, 2007:210 http://ieeexplore.ieee.org/document/4242339/
[7]
Meyer R G. Low-power monolithic RF peak detector analysis. IEEE J Solid-State Circuits, 1995, 30(1):65 doi: 10.1109/4.350192
[8]
Milanovic V, Gaitan M, Marshall J C, et al. CMOS foundry implementation of Schottky diodes for RF detection. IEEE Trans Electron Devices, 1996, 43(12):2210 doi: 10.1109/16.544393
[9]
Yin Q, Eisenstadt W R, Fox R M, et al. A translinear RMS detector for embedded test of RF ICs. IEEE Trans Instrumentation and Measurement, 2005, 54(5):1708 doi: 10.1109/TIM.2005.855105
[10]
Winter S M, Ehm H J, Koelpin A, et al. Diode power detector DC operating point in six-port communications receivers. 37th European Microwave Conference, 2007:795 http://ieeexplore.ieee.org/document/4405312/
[11]
Yamamoto K, Miyashita M, Kurusu H, et al. A current-mirror-based GaAs-HBT RF power detector for wireless applications. ICSICT, 2007:1 http://ieeexplore.ieee.org/document/4384432/?arnumber=4384432&contentType=Conference%20Publications
[12]
Gorisse J, Cathelin A, Kaiser A, et al. A 60 GHz 65 nm CMOS RMS power detector for antenna impedance mismatch detection. ESSCIRC, 2009:172
[13]
Ho S. A 450 MHz CMOS RF power detector. IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2001:209 http://ieeexplore.ieee.org/document/935677/
[14]
Kouwenhoven M, Staveren A V. A 2 GHz mean-square power detector with integrated offset chopper. IEEE Intel Solid-State Circuits Conference Digest of Technical Papers, 2005:124 http://ieeexplore.ieee.org/document/1493900/?reload=true&arnumber=1493900&contentType=Conference%20Publications
[15]
Dai Y, Han K, Yan N, et al. A high dynamic range linear RF power detector with a preceding LNA. Journal of Semiconductors, 2012, 33(1):015005 doi: 10.1088/1674-4926/33/1/015005

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    Received: 30 May 2012 Revised: 09 October 2012 Online: Published: 01 March 2013

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      Article Navigation >  Journal of Semiconductors  > 2013  >  34(3): 035001
      Taotao Yan, Hui Wang, Jinbo Li, Jianjun Zhou. A digitally calibrated CMOS RMS power detector for RF automatic gain control[J]. Journal of Semiconductors, 2013, 34(3): 035001. doi: 10.1088/1674-4926/34/3/035001 ****T T Yan, H Wang, J B Li, J J Zhou. A digitally calibrated CMOS RMS power detector for RF automatic gain control[J]. J. Semicond., 2013, 34(3): 035001. doi: 10.1088/1674-4926/34/3/035001.
      Citation:
      Taotao Yan, Hui Wang, Jinbo Li, Jianjun Zhou. A digitally calibrated CMOS RMS power detector for RF automatic gain control[J]. Journal of Semiconductors, 2013, 34(3): 035001. doi: 10.1088/1674-4926/34/3/035001 ****
      T T Yan, H Wang, J B Li, J J Zhou. A digitally calibrated CMOS RMS power detector for RF automatic gain control[J]. J. Semicond., 2013, 34(3): 035001. doi: 10.1088/1674-4926/34/3/035001.
      shu

      A digitally calibrated CMOS RMS power detector for RF automatic gain control

      DOI: 10.1088/1674-4926/34/3/035001

      • School of Microelectronics, Shanghai Jiao Tong University, Shanghai 200240, China

      Funds:

      Project supported by the National High Technology Research and Development Program of China (No. 2009AA011608) and the Chinese National Major Science and Technology Projects Program (No. 2009ZX01031-002-011-001)

      the National High Technology Research and Development Program of China 2009AA011608

      the Chinese National Major Science and Technology Projects Program 2009ZX01031-002-011-001

      More Information
      • Corresponding author: Yan Taotao, Email:yantaotao@ic.sjtu.edu.cn
      • Received Date: 2012-05-30
      • Revised Date: 2012-10-09
      • Published Date: 2013-03-01

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