J. Semicond. > 2013, Volume 34 > Issue 6 > 064008
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SEMICONDUCTOR DEVICES

A low temperature processed Si-quantum-dot poly-Si TFT nonvolatile memory device

Wei Sun

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 Corresponding author: Sun Wei, Email:1974623728@qq.com

DOI: 10.1088/1674-4926/34/6/064008

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Abstract: This paper reports on a successful demonstration of poly-Si TFT nonvolatile memory with a much reduced thermal-budget. The TFT uses uniform Si quantum-dots (size 10 nm and density 1011 cm-2) as storage media, obtained via LPCVD by flashing SiH4/H2 at 580℃ for 15 s on a Si3N4 surface. The poly-Si grain-enlargement step was shifted after source/drain formation. The NiSix-silicided source/drain enables a fast lateral-recrystallization, and thus grain-enlargement can be accomplished by a much reduced thermal-cycle (i.e., 550℃/4 h). The excellent memory characteristics suggest that the proposed poly-Si TFT Si quantum-dot memory and associated processes are promising for use in wider TFT applications, such as system-on-glass.

Key words: poly-silicon TFT, nonvolatile memory, low-thermal-budget, metal-induced lateral crystallization, Si-quantum-dots



[1]
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[4]
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[5]
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[6]
Lai E K, Lue H T, Hsiao Y H, et al. A multi-layer stackable thin-film transistor (TFT) NAND-type flash memory. IEDM Tech Dig, 2006:41 http://ieeexplore.ieee.org/document/4154322/?reload=true&tp=&arnumber=4154322&contentType=Conference%20Publications&punumber%3D4154162
[7]
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Zhan N, Olmedo M, Wang G, et al. Graphene based nickel nanocrystal flash memory. Appl Phys Lett, 2011, 99:113112 doi: 10.1063/1.3640210
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[10]
Lin Y, Chien C H, Lin C T, et al. High-performance nonvolatile HfO2 nanocrystal memory. IEEE Electron Device Lett, 2005, 26(3):154 doi: 10.1109/LED.2004.842727
[11]
Chang Y W, Lu T C, Pan S, et al. Modeling for the 2nd-bit effect of a nitride-based trapping storage flash EEPROM cell under two-bit operation. IEEE Electron Device Lett, 2005, 26(3):154 doi: 10.1109/LED.2004.842727
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Fig. 1.  (a) Schematic cross-section of the TFT silicon quantum-dots nonvolatile memory device structure and process details. (b) SEM image of Si quantum-dots grown on a nitride layer. The density of the dots is $\sim $10$^{11}$ cm$^{-2}$. (c) Cross-section TEM image of the device.

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Fig. 2.  (a) $I_{\rm d}$-$V_{\rm g}$ curves of TFT quantum-dot memory after programming or erasure operations of TFT quantum-dot memory. (b) Programmed and erased characteristics of TFT quantum-dot memory. The erasing time is fixed at 10 ms.

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Fig. 3.  (a) Retention characteristics of TFT quantum-dots memory. Program/Erase states have been stable, and a low charge-loss is only observed after $\sim$10$^{4}$ s. (b) Endurance characteristics of TFT quantum-dots memory. The memory window narrows to about 0.8 V after 10$^{5}$ P/E cycles.

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Fig. 4.  (a) 2-bit memory operation. Bit-1: drain side; Bit-2: source side. (b) Table comparing devices of this work with conventional TFT transistors.

DownLoad: Full-Size Img PowerPoint
[1]
Kagan C R, Andry P. Thin-film transistors. Marcel Dekker, Inc., 2003
[2]
Wu C, Meng Z, Xiong S, et al. Application of metal induced unilaterally crystallizaed polycrstalline silicon thin-film transistor technology to system-on-glass display. Journal of Non-Cyrstalline Solids, 2006, 352(9-20):1741 doi: 10.1016/j.jnoncrysol.2005.11.150
[3]
Oh J H, Chung H J, Lee N I, et al. A high-endurance low-temperature polysilicon thin-film transistor EEPROM cell. IEEE Electron Device Lett, 2000, 21(6):304 doi: 10.1109/55.843158
[4]
Lin Y H, Chien C H, Chou T H, et al. Impact of channel dangling bonds on reliability characteristics of flash memory on poly-Si thin films. IEEE Electron Device Lett, 2007, 28(4):267 doi: 10.1109/LED.2007.891789
[5]
Lin Y H, Chien C H, Chou T H, et al. Low-temperature polycrystalline silicon thin-film flash memory with hafnium silicate. IEEE Trans Electron Devices, 2007, 54(3):531 doi: 10.1109/TED.2006.890379
[6]
Lai E K, Lue H T, Hsiao Y H, et al. A multi-layer stackable thin-film transistor (TFT) NAND-type flash memory. IEDM Tech Dig, 2006:41 http://ieeexplore.ieee.org/document/4154322/?reload=true&tp=&arnumber=4154322&contentType=Conference%20Publications&punumber%3D4154162
[7]
Walker A J, Nallamothu S, Chen E H, et al. 3D TFT-SONOS memory cell for ultra-high density file storage applications. Symp VLSI Technology Digest of Technical Papers, 2003:29 http://ieeexplore.ieee.org/document/1221070/?arnumber=1221070&sortType%3Dasc_p_Sequence%26filter%3DAND(p_IS_Number:27436)
[8]
Zhan N, Olmedo M, Wang G, et al. Graphene based nickel nanocrystal flash memory. Appl Phys Lett, 2011, 99:113112 doi: 10.1063/1.3640210
[9]
Wu Y C, Hung M F, Su P W. Improving the performance of nanowires polycrystalline silicon twin thin-film transistors nonvolatile memory by NH3 plasma passivation. J Electrochem Soc, 2011, 158(5):H578 https://www.researchgate.net/publication/274463710_Improving_the_Performance_of_Nanowires_Polycrystalline_Silicon_Twin_Thin-Film_Transistors_Nonvolatile_Memory_by_NH3_Plasma_Passivation
[10]
Lin Y, Chien C H, Lin C T, et al. High-performance nonvolatile HfO2 nanocrystal memory. IEEE Electron Device Lett, 2005, 26(3):154 doi: 10.1109/LED.2004.842727
[11]
Chang Y W, Lu T C, Pan S, et al. Modeling for the 2nd-bit effect of a nitride-based trapping storage flash EEPROM cell under two-bit operation. IEEE Electron Device Lett, 2005, 26(3):154 doi: 10.1109/LED.2004.842727
[12]
Kuo Y. Thin film transistors:material and processes. Vol. 2:Polycrystalline silicon thin film transistor. Kluwer Academic Publisher, 2004

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    Received: 03 December 2012 Revised: 07 January 2013 Online: Published: 01 June 2013

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      Article Navigation >  Journal of Semiconductors  > 2013  >  34(6): 064008
      Wei Sun. A low temperature processed Si-quantum-dot poly-Si TFT nonvolatile memory device[J]. Journal of Semiconductors, 2013, 34(6): 064008. doi: 10.1088/1674-4926/34/6/064008 ****W Sun. A low temperature processed Si-quantum-dot poly-Si TFT nonvolatile memory device[J]. J. Semicond., 2013, 34(6): 064008. doi: 10.1088/1674-4926/34/6/064008.
      Citation:
      Wei Sun. A low temperature processed Si-quantum-dot poly-Si TFT nonvolatile memory device[J]. Journal of Semiconductors, 2013, 34(6): 064008. doi: 10.1088/1674-4926/34/6/064008 ****
      W Sun. A low temperature processed Si-quantum-dot poly-Si TFT nonvolatile memory device[J]. J. Semicond., 2013, 34(6): 064008. doi: 10.1088/1674-4926/34/6/064008.
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      A low temperature processed Si-quantum-dot poly-Si TFT nonvolatile memory device

      DOI: 10.1088/1674-4926/34/6/064008

      • Department of Electronic Engineering, Wuyi University, Wuyishan 354300, China

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      • Corresponding author: Sun Wei, Email:1974623728@qq.com
      • Received Date: 2012-12-03
      • Revised Date: 2013-01-07
      • Published Date: 2013-06-01

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