A fully integrated 3.5 GHz CMOS differential power amplifier driver

Xiaodong Xu; Haigang Yang; Tongqiang Gao; Hongfeng Zhang

doi:10.1088/1674-4926/34/7/075006

J. Semicond. > 2013, Volume 34 > Issue 7 > 075006

SEMICONDUCTOR INTEGRATED CIRCUITS

A fully integrated 3.5 GHz CMOS differential power amplifier driver

Xiaodong Xu^{1, 2}, Haigang Yang^1,, Tongqiang Gao¹ and Hongfeng Zhang^{1, 2}

+ Author Affiliations

Corresponding author: Yang Haigang, yanghg@mail.ie.ac.cn

DOI: 10.1088/1674-4926/34/7/075006

Abstract: A fully integrated CMOS differential power amplifier driver (PAD) is proposed for WiMAX applications. In order to fulfill the differential application requirements, a transmission line transformer is used as the output matching network. A differential inductance constitutes an inter-stage matching network. Meanwhile, an on chip balun realizes input matching as well as single-end to differential conversion. The PAD is fabricated in a 0.13 μm RFCMOS process. The chip size is 1.1×1.1 mm² with all of the matching network integrated on chip. The saturated power is around 10 dBm and power gain is about 12 dB.

Key words: CMOS PA, power amplifier driver, transformer, balun, WiMAX

References

[1]	Niknejad A M, Chowdhury D, Chen J. Design of CMOS Power Amplifier. IEEE Trans Microw Theory Tech, 2012, 60(6):1784 doi: 10.1109/TMTT.2012.2193898
[2]	Guo Rui, Zhang Haiying. A multi-mode multi-band RF receiver front-end for a TD-SCDMA/LTE/LTEadvanced in 0.18-μm CMOS process. Journal of Semiconductors, 2012, 33(9):095003 doi: 10.1088/1674-4926/33/9/095003
[3]	Liang Yaping, Che Dazhi, Liang Cheng, et al. An integrated CMOS high data rate transceiver for video applications. Journal of Semiconductors, 2012, 33(7):075005 doi: 10.1088/1674-4926/33/7/075005
[4]	Degani O, Cossoy F, Shahaf S, et al. A 90 nm CMOS power amplifier for 802.16e (WiMAX) applications. Proc IEEE RFIC, 2009:373 http://ieeexplore.ieee.org/document/5438821/authors
[5]	Chowdhury D, Hull C D, Degani O B, et al. A fully integrated dual-mode highly linear 2.4 GHz CMOS power amplifier for 4G WiMAX applications. IEEE J Solid-State Circuits, 2009, 44(12):3393 doi: 10.1109/JSSC.2009.2032277
[6]	Sowlati T, et al. A 2.4 GHz 0.18μm CMOS self-biased cascode power amplifier with 23 dBm output power. IEEE International Solid State Circuits Conference, 2002:294
[7]	Chowdhury D. Efficient transmitter for wireless communication in nanoscale CMOS technology. PhD Thesis, Electrical Engineering and Computer Science Department, University of California at Berkeley, 2010
[8]	Haldi P, Chowdhury D, Reynaert P, et al. A 5.8 GHz 1 V linear power amplifier using a novel on-chip transformer power combiner in standard 90 nm CMOS. IEEE J Solid-State Circuits, 2008, 43(5):1054 doi: 10.1109/JSSC.2008.920347
[9]	Yue C P, Wong S S. On-chip spiral inductors with patterned ground shields for Si-based RF IC's. IEEE J Solid-State Circuits, 1998, 33(5):743 doi: 10.1109/4.668989
[10]	Aoki I, Kee S D, Rutledge D B, et al. Distributed active transform a new power combining and impedance transformation technique. IEEE Trans Microw Theory Tech, 2002, 50(1):316 doi: 10.1109/22.981284
[11]	Shim S, Han J, Hong S. A CMOS RF polar transmitter of a UHF mobile RFID reader for high power efficiency. IEEE Microw Wireless Compon Lett, 2008, 9(18):635
[12]	Han J, Kim Y, Park C, et al. A fully-integrated 900-MHz CMOS power amplifier for mobile RFID reader applications. Proc IEEE RFIC, 2006 http://ieeexplore.ieee.org/document/1651174/
[13]	Advanced Design System Manual: Momentum, 2001
[14]	Cripps S C. RF power amplifiers for wireless communications. Boston, London:Artech House, 1999 http://ieeexplore.ieee.org/document/823830/citations
[15]	Kim J, Kim T, Jeong M, et al. A 2.4-GHz CMOS driver amplifier based on multiple-gated transistor and resistive source degeneration for mobile WiMAX. IEEE Asian Solid-State Circuits Conference, 2006:255 http://ieeexplore.ieee.org/document/4197638/
[16]	Kim D, Hong N, Choi Y. A novel linearization method of CMOS drive amplifier using IMD canceller. IEEE Microw Wireless Compon Lett, 2009, 9(10):671 http://ieeexplore.ieee.org/document/5232822/keywords
[17]	Fu Jian, Mei Niansong, Huang Yumei, et al. CMOS high linearity PA driver with an on-chip transformer for W-CDMA application. Journal of Semiconductors, 2011, 32(9):095006 doi: 10.1088/1674-4926/32/9/095006

Fig. 1. Fully schematic of the PAD circuit

DownLoad: Full-Size Img PowerPoint

Fig. 2. Simplified model of a 1 : n transformer

DownLoad: Full-Size Img PowerPoint

Fig. 3. The relationship between efficiency and L_p, C_L of the transformer at 3.5 GHz

DownLoad: Full-Size Img PowerPoint

Fig. 4. The relationship between Real(Z_in) and L_p, C_L of the transformer at 3.5 GHz.

DownLoad: Full-Size Img PowerPoint

Fig. 5. The relationship between E and L_p, C_L of the transformer at 3.5 GHz.

DownLoad: Full-Size Img PowerPoint

Fig. 6. The layout of 1 : 1 transformer.

DownLoad: Full-Size Img PowerPoint

Fig. 7. The simulation result of insertion loss.

DownLoad: Full-Size Img PowerPoint

Fig. 8. The layout of differential inductance L_diff.

DownLoad: Full-Size Img PowerPoint

Fig. 9. Chip microphotograph of the PAD.

DownLoad: Full-Size Img PowerPoint

Fig. 10. Measured S parameter of the PAD.

DownLoad: Full-Size Img PowerPoint

Fig. 11. Large signal measurement of PAD.

DownLoad: Full-Size Img PowerPoint

Fig. 12. Two tones measurement of the PAD.

DownLoad: Full-Size Img PowerPoint

Table 1. Summary of comparison between this work and others.

[1]	Niknejad A M, Chowdhury D, Chen J. Design of CMOS Power Amplifier. IEEE Trans Microw Theory Tech, 2012, 60(6):1784 doi: 10.1109/TMTT.2012.2193898
[2]	Guo Rui, Zhang Haiying. A multi-mode multi-band RF receiver front-end for a TD-SCDMA/LTE/LTEadvanced in 0.18-μm CMOS process. Journal of Semiconductors, 2012, 33(9):095003 doi: 10.1088/1674-4926/33/9/095003
[3]	Liang Yaping, Che Dazhi, Liang Cheng, et al. An integrated CMOS high data rate transceiver for video applications. Journal of Semiconductors, 2012, 33(7):075005 doi: 10.1088/1674-4926/33/7/075005
[4]	Degani O, Cossoy F, Shahaf S, et al. A 90 nm CMOS power amplifier for 802.16e (WiMAX) applications. Proc IEEE RFIC, 2009:373 http://ieeexplore.ieee.org/document/5438821/authors
[5]	Chowdhury D, Hull C D, Degani O B, et al. A fully integrated dual-mode highly linear 2.4 GHz CMOS power amplifier for 4G WiMAX applications. IEEE J Solid-State Circuits, 2009, 44(12):3393 doi: 10.1109/JSSC.2009.2032277
[6]	Sowlati T, et al. A 2.4 GHz 0.18μm CMOS self-biased cascode power amplifier with 23 dBm output power. IEEE International Solid State Circuits Conference, 2002:294
[7]	Chowdhury D. Efficient transmitter for wireless communication in nanoscale CMOS technology. PhD Thesis, Electrical Engineering and Computer Science Department, University of California at Berkeley, 2010
[8]	Haldi P, Chowdhury D, Reynaert P, et al. A 5.8 GHz 1 V linear power amplifier using a novel on-chip transformer power combiner in standard 90 nm CMOS. IEEE J Solid-State Circuits, 2008, 43(5):1054 doi: 10.1109/JSSC.2008.920347
[9]	Yue C P, Wong S S. On-chip spiral inductors with patterned ground shields for Si-based RF IC's. IEEE J Solid-State Circuits, 1998, 33(5):743 doi: 10.1109/4.668989
[10]	Aoki I, Kee S D, Rutledge D B, et al. Distributed active transform a new power combining and impedance transformation technique. IEEE Trans Microw Theory Tech, 2002, 50(1):316 doi: 10.1109/22.981284
[11]	Shim S, Han J, Hong S. A CMOS RF polar transmitter of a UHF mobile RFID reader for high power efficiency. IEEE Microw Wireless Compon Lett, 2008, 9(18):635
[12]	Han J, Kim Y, Park C, et al. A fully-integrated 900-MHz CMOS power amplifier for mobile RFID reader applications. Proc IEEE RFIC, 2006 http://ieeexplore.ieee.org/document/1651174/
[13]	Advanced Design System Manual: Momentum, 2001
[14]	Cripps S C. RF power amplifiers for wireless communications. Boston, London:Artech House, 1999 http://ieeexplore.ieee.org/document/823830/citations
[15]	Kim J, Kim T, Jeong M, et al. A 2.4-GHz CMOS driver amplifier based on multiple-gated transistor and resistive source degeneration for mobile WiMAX. IEEE Asian Solid-State Circuits Conference, 2006:255 http://ieeexplore.ieee.org/document/4197638/
[16]	Kim D, Hong N, Choi Y. A novel linearization method of CMOS drive amplifier using IMD canceller. IEEE Microw Wireless Compon Lett, 2009, 9(10):671 http://ieeexplore.ieee.org/document/5232822/keywords
[17]	Fu Jian, Mei Niansong, Huang Yumei, et al. CMOS high linearity PA driver with an on-chip transformer for W-CDMA application. Journal of Semiconductors, 2011, 32(9):095006 doi: 10.1088/1674-4926/32/9/095006

Search

GET CITATION

shu

Export: BibTex EndNote

Article Metrics

Article views: 2672 Times PDF downloads: 28 Times Cited by: 0 Times

History

Received: 19 December 2012 Revised: 11 January 2013 Online: Published: 01 July 2013

A fully integrated CMOS differential power amplifier driver (PAD) is proposed for WiMAX applications. In order to fulfill the differential application requirements, a transmission line transformer is used as the output matching network. A differential inductance constitutes an inter-stage matching network. Meanwhile, an on chip balun realizes input matching as well as single-end to differential conversion. The PAD is fabricated in a 0.13 μm RFCMOS process. The chip size is 1.1×1.1 mm² with all of the matching network integrated on chip. The saturated power is around 10 dBm and power gain is about 12 dB.

A fully integrated 3.5 GHz CMOS differential power amplifier driver

References

Search

GET CITATION

Share:

Article Metrics

History

Catalog

Email This Article

A fully integrated 3.5 GHz CMOS differential power amplifier driver

DOI: 10.1088/1674-4926/34/7/075006

Abstract

References

Proportional views

Catalog

A fully integrated 3.5 GHz CMOS differential power amplifier driver

References

Search

GET CITATION

Share:

Article Metrics

History

Catalog

Email This Article

A fully integrated 3.5 GHz CMOS differential power amplifier driver

DOI: 10.1088/1674-4926/34/7/075006

Abstract

References

Proportional views

Catalog

Export File

Citation

Format

Content