Fig. 1.
Schematic diagram of the O-scavenging structure
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| Citation: |
Xueli Ma, Kai Han, Wenwu Wang. Remote scavenging technology using a Ti/TiN capping layer interposed in a metal/high-k gate stack[J]. Journal of Semiconductors, 2013, 34(7): 076001. doi: 10.1088/1674-4926/34/7/076001
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X L Ma, K Han, W W Wang. Remote scavenging technology using a Ti/TiN capping layer interposed in a metal/high-k gate stack[J]. J. Semicond., 2013, 34(7): 076001. doi: 10.1088/1674-4926/34/7/076001.
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Remote scavenging technology using a Ti/TiN capping layer interposed in a metal/high-k gate stack
DOI: 10.1088/1674-4926/34/7/076001
More Information
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Abstract
High permittivity materials have been required to replace traditional SiO2 as the gate dielectric to extend Moore's law. However, growth of a thin SiO2-like interfacial layer (IL) is almost unavoidable during the deposition or subsequent high temperature annealing. This limits the scaling benefits of incorporating high-k dielectrics into transistors. In this work, a promising approach, in which an O-scavenging metal layer and a barrier layer preventing scavenged metal diffusing into the high-k gate dielectric are used to engineer the thickness of the IL, is reported. Using a Ti scavenging layer and TiN barrier layer on a HfO2 dielectric, the effective removal of the IL and almost no Ti diffusing into the HfO2 have been confirmed by high resolution transmission electron microscopy and X-ray photoelectron spectroscopy.-
Keywords:
- scavenging technology,
- EOT,
- barrier layer,
- TEM,
- XPS
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References
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