J. Semicond. > 2014, Volume 35 > Issue 3 > 035004
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SEMICONDUCTOR INTEGRATED CIRCUITS

A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step

Nan Lin1, , Fei Fang1, 2, Zhiliang Hong1 and Hao Fang3

+ Author Affiliations

 Corresponding author: Lin Nan, Email:linnan@fudan.edu.cn

DOI: 10.1088/1674-4926/35/3/035004

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Abstract: A broadband programmable gain amplifier (PGA) with a small gain step and low gain error has been designed in 0.13 μm CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A two-stage gain control method, which consists of a resistor ladder attenuator and an active fine gain control stage, provides the small gain step. A look-up table based gain control method is introduced in the fine gain control stage to lower the gain error. The proposed PGA shows a decibel-linear variable gain from -4 to 20 dB with a gain step of 0.1 dB and a gain error less than ±0.05 dB. The 3-dB bandwidth and maximum ⅡP3 are 3.8 GHz and 17 dBm, respectively.

Key words: variable gain amplifier, programmable gain amplifier, decibel-linear gain, CMOS integrated circuits, hard disk drives



[1]
Yoo S J, Ravindran A, Ismail M. A low voltage CMOS transresistance-based variable gain amplifier. IEEE International Symposium on Circuits and Systems, 2004:809 http://ieeexplore.ieee.org/xpl/abstractKeywords.jsp?reload=true&arnumber=1328318&contentType=Conference+Publications
[2]
Lin N, Fang F, Hong Z L, et al. A CMOS broadband precise programmable gain amplifier with bandwidth extension technique. IEEE Asian Solid-State Circuits Conference, 2011:225 http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=6123643&punumber%3D6118260
[3]
Duong Q H, Le Q, Kim C W, et al. A 95-dB linear low-power variable gain amplifier. IEEE Trans Circuits Syst Ⅰ, Regular Papers, 2006, 47(8):1648 http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1673635&userType=
[4]
Nguyen H H, Duong Q H, Lee S G. 84 dB 5.2 mA digitally-controlled variable gain amplifier. Electron Lett, 2008, 44(5):344 doi: 10.1049/el:20080135
[5]
Nguyen H H, Nguyen H N, Lee J S, et al. A binary-weighted switching and reconfiguration-based programmable gain amplifier. IEEE Trans Circuits Syst Ⅱ, Express Briefs, 2009, 56(9):699 doi: 10.1109/TCSII.2009.2027958
[6]
Calvo B, Celma S, Aznar F, et al. Low-voltage CMOS programmable gain amplifier for UHF applications. Electron Lett, 2007, 43(20):1087 doi: 10.1049/el:20071140
[7]
Lazavi B. Design of integrated circuits for optical communications. Boston:McGraw-Hill, 2003
[8]
Iwon K, Lee K. An accurate behavioral model for RF MOSFET linearity analysis. IEEE Microw Wireless Compon Lett, 2007, 17(12):897 doi: 10.1109/LMWC.2007.910518
[9]
Bastos J, Steyaert M, Sansen W. A high yield 12-bit 250-MS/s CMOS D/A converter. IEEE Custom Integrated Circuits Conference, 1996:431 http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=510591
[10]
Haines G W, Mataya J A, Marshall S B. IF amplifier using Cc compensated transistors. ISSCC Dig Tech Papers, 1968:120 http://ieeexplore.ieee.org/xpl/abstractAuthors.jsp?reload=true&arnumber=1154641
[11]
Wang Y, Afshar B, Cheng T Y, et al. A 2.5 mW inductorless wideband VGA with dual feedback DC-offset correction in 90 nm CMOS technology. IEEE RFIC Symp Dig, 2008:91 doi: 10.1088/1674-4926/33/1/015009
[12]
D'Amico S, Spagnolo A, Donno A, et al. A 9.5 mW analog baseband RX section for 60 GHz communications in 90 nm CMOS. IEEE RFIC Symp Dig, 2011:1 http://ieeexplore.ieee.org/document/5940689/
[13]
Lee H D, Lee K A, Hong S. A wideband CMOS variable gain amplifier with an exponential gain control. IEEE Trans Microwave Theory Tech, 2007, 55(6):1363 doi: 10.1109/TMTT.2007.896787
[14]
Liu Chang, Yan Yuepeng, Goh Wangling, et al. A 10-Gb/s inductor-less variable gain amplifier with a linear-in-dB characteristic and DC-offset cancellation. Journal of Semiconductors, 2012, 33(8):085003 doi: 10.1088/1674-4926/33/8/085003
Fig. 1.  Proposed PGA with (a) resistor network, (b) closed-loop gain control stage, (c) variable input and load transconductance and (d) variable input transconductance.

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Fig. 2.  Architecture of a HDD read channel.

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Fig. 3.  Schematic of the resistor ladder attenuator.

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Fig. 4.  Topology of Cherry-Hooper amplifier.

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Fig. 5.  Schematic of the FGC.

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Fig. 6.  Schematic of the FGA.

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Fig. 7.  Micrograph of the proposed PGA.

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Fig. 8.  Measured voltage gain and gain error versus gain setting.

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Fig. 9.  Measured frequency response at different gains.

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Fig. 10.  Measured IIP3 at different gain. (a) gain = 20 dB. (b) gain =-4 dB.

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Table 1.   Performance summary and comparison to state-of-art.
[1]
Yoo S J, Ravindran A, Ismail M. A low voltage CMOS transresistance-based variable gain amplifier. IEEE International Symposium on Circuits and Systems, 2004:809 http://ieeexplore.ieee.org/xpl/abstractKeywords.jsp?reload=true&arnumber=1328318&contentType=Conference+Publications
[2]
Lin N, Fang F, Hong Z L, et al. A CMOS broadband precise programmable gain amplifier with bandwidth extension technique. IEEE Asian Solid-State Circuits Conference, 2011:225 http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=6123643&punumber%3D6118260
[3]
Duong Q H, Le Q, Kim C W, et al. A 95-dB linear low-power variable gain amplifier. IEEE Trans Circuits Syst Ⅰ, Regular Papers, 2006, 47(8):1648 http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1673635&userType=
[4]
Nguyen H H, Duong Q H, Lee S G. 84 dB 5.2 mA digitally-controlled variable gain amplifier. Electron Lett, 2008, 44(5):344 doi: 10.1049/el:20080135
[5]
Nguyen H H, Nguyen H N, Lee J S, et al. A binary-weighted switching and reconfiguration-based programmable gain amplifier. IEEE Trans Circuits Syst Ⅱ, Express Briefs, 2009, 56(9):699 doi: 10.1109/TCSII.2009.2027958
[6]
Calvo B, Celma S, Aznar F, et al. Low-voltage CMOS programmable gain amplifier for UHF applications. Electron Lett, 2007, 43(20):1087 doi: 10.1049/el:20071140
[7]
Lazavi B. Design of integrated circuits for optical communications. Boston:McGraw-Hill, 2003
[8]
Iwon K, Lee K. An accurate behavioral model for RF MOSFET linearity analysis. IEEE Microw Wireless Compon Lett, 2007, 17(12):897 doi: 10.1109/LMWC.2007.910518
[9]
Bastos J, Steyaert M, Sansen W. A high yield 12-bit 250-MS/s CMOS D/A converter. IEEE Custom Integrated Circuits Conference, 1996:431 http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=510591
[10]
Haines G W, Mataya J A, Marshall S B. IF amplifier using Cc compensated transistors. ISSCC Dig Tech Papers, 1968:120 http://ieeexplore.ieee.org/xpl/abstractAuthors.jsp?reload=true&arnumber=1154641
[11]
Wang Y, Afshar B, Cheng T Y, et al. A 2.5 mW inductorless wideband VGA with dual feedback DC-offset correction in 90 nm CMOS technology. IEEE RFIC Symp Dig, 2008:91 doi: 10.1088/1674-4926/33/1/015009
[12]
D'Amico S, Spagnolo A, Donno A, et al. A 9.5 mW analog baseband RX section for 60 GHz communications in 90 nm CMOS. IEEE RFIC Symp Dig, 2011:1 http://ieeexplore.ieee.org/document/5940689/
[13]
Lee H D, Lee K A, Hong S. A wideband CMOS variable gain amplifier with an exponential gain control. IEEE Trans Microwave Theory Tech, 2007, 55(6):1363 doi: 10.1109/TMTT.2007.896787
[14]
Liu Chang, Yan Yuepeng, Goh Wangling, et al. A 10-Gb/s inductor-less variable gain amplifier with a linear-in-dB characteristic and DC-offset cancellation. Journal of Semiconductors, 2012, 33(8):085003 doi: 10.1088/1674-4926/33/8/085003

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    Received: 31 July 2013 Revised: 12 October 2013 Online: Published: 01 March 2014

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      Article Navigation >  Journal of Semiconductors  > 2014  >  35(3): 035004
      Nan Lin, Fei Fang, Zhiliang Hong, Hao Fang. A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step[J]. Journal of Semiconductors, 2014, 35(3): 035004. doi: 10.1088/1674-4926/35/3/035004 ****N Lin, F Fang, Z L Hong, H Fang. A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step[J]. J. Semicond., 2014, 35(3): 035004. doi: 10.1088/1674-4926/35/3/035004.
      Citation:
      Nan Lin, Fei Fang, Zhiliang Hong, Hao Fang. A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step[J]. Journal of Semiconductors, 2014, 35(3): 035004. doi: 10.1088/1674-4926/35/3/035004 ****
      N Lin, F Fang, Z L Hong, H Fang. A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step[J]. J. Semicond., 2014, 35(3): 035004. doi: 10.1088/1674-4926/35/3/035004.
      shu

      A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step

      DOI: 10.1088/1674-4926/35/3/035004
      • 1.

        State Key Laboratory of ASIC and Systems, Fudan University, Shanghai 201203, China

      • 2.

        Telink Semiconductor Co, Ltd, Shanghai 201203, China

      • 3.

        LSI Corporation, 1320 Ridder Park Drive, San Jose, CA 95131, USA

      More Information
      • Corresponding author: Lin Nan, Email:linnan@fudan.edu.cn
      • Received Date: 2013-07-31
      • Revised Date: 2013-10-12
      • Published Date: 2014-03-01

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