An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression

Xiaofei Liao; Dixian Zhao; Xiaohu You

doi:10.1088/1674-4926/43/9/092401

J. Semicond. > 2022, Volume 43 > Issue 9 > 092401

ARTICLES

An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression

Xiaofei Liao^{1, 2}, Dixian Zhao^{1, 2,} and Xiaohu You^{1, 2}

+ Author Affiliations

Corresponding author: Dixian Zhao, dixian.zhao@seu.edu.cn

DOI: 10.1088/1674-4926/43/9/092401

Abstract: This paper presents an E-band frequency quadrupler in 40-nm CMOS technology. The circuit employs two push–push frequency doublers and two single-stage neutralized amplifiers. The pseudo-differential class-B biased cascode topology is adopted for the frequency doubler, which improves the reverse isolation and the conversion gain. Neutralization technique is applied to increase the stability and the power gain of the amplifiers simultaneously. The stacked transformers are used for single-ended-to-differential transformation as well as output bandpass filtering. The output bandpass filter enhances the 4th-harmonic output power, while rejecting the undesired harmonics, especially the 2nd harmonic. The core chip is 0.23 mm² in size and consumes 34 mW. The measured 4th harmonic achieves a maximum output power of 1.7 dBm with a peak conversion gain of 3.4 dB at 76 GHz. The fundamental and 2nd-harmonic suppressions of over 45 and 20 dB are achieved for the spectrum from 74 to 82 GHz, respectively.

Key words: capacitor neutralization, CMOS, E-band, frequency doubler, frequency quadrupler, push–push

References

[1]	Ma T K, Deng W, Chen Z P, et al. A CMOS 76–81-GHz 2-TX 3-RX FMCW radar transceiver based on mixed-mode PLL chirp generator. IEEE J Solid State Circuits, 2020, 55, 233 doi: 10.1109/JSSC.2019.2950184
[2]	Lin J F, Song Z, Qi N, et al. A 77-GHz mixed-mode FMCW signal generator based on Bang-Bang phase detector. IEEE J Solid State Circuits, 2018, 53, 2850 doi: 10.1109/JSSC.2018.2856248
[3]	Deng W, Jia H K, Chi B Y. Silicon-based FMCW signal generators: A review. J Semicond, 2020, 41(11), 1114018 doi: 10.1088/1674-4926/41/11/111401
[4]	Martins R, Lourenço N, Horta N, et al. Design of a 4.2-to-5.1 GHz ultralow-power complementary class-B/C hybrid-mode VCO in 65-nm CMOS fully supported by EDA tools. IEEE Trans Circuits Syst I, 2020, 67, 3965 doi: 10.1109/TCSI.2020.3009857
[5]	Haghi Kashani M, Molavi R, Mirabbasi S. A 2.3-mW 26.3-GHz G_m -boosted differential colpitts VCO with 20% tuning range in 65-nm CMOS. IEEE Trans Microwave Theory Tech, 2019, 67, 1556 doi: 10.1109/TMTT.2019.2899573
[6]	Mammei E, Monaco E, Mazzanti A, et al. A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension. 2013 IEEE International Solid-State Circuits Conference, 2013, 350 doi: 10.1109/ISSCC.2013.6487765
[7]	Liu X L, Chao Y, Luong H C. A 59-to-276-GHz CMOS signal generator using varactor-less VCO and dual-mode ILFD. IEEE J Solid State Circuits, 2021, 56, 2324 doi: 10.1109/JSSC.2020.3045741
[8]	Aghasi H, Cathelin A, Afshari E. A 0.92-THz SiGe power radiator based on a nonlinear theory for harmonic generation. IEEE J Solid State Circuits, 2017, 52, 406 doi: 10.1109/JSSC.2016.2627547
[9]	Nikpaik A, Masnadi Shirazi A H, Nabavi A, et al. A 219-to-231 GHz frequency-multiplier-based VCO with ~3% peak DC-to-RF efficiency in 65-nm CMOS. IEEE J Solid State Circuits, 2018, 53, 389 doi: 10.1109/JSSC.2017.2759116
[10]	Wu L, Liao S W, Xue Q. A 312-GHz CMOS injection-locked radiator with chip-and-package distributed antenna. IEEE J Solid State Circuits, 2017, 52, 2920 doi: 10.1109/JSSC.2017.2727046
[11]	Zhou Z B, Li W, Li N, et al. A wide locking range and low DC power injection-locked frequency tripler for K-band application. J Semicond, 2014, 35(12), 125008 doi: 10.1088/1674-4926/35/12/125008
[12]	Kim K, Lee K, Shin G, et al. A 50-Gb/s compact E-band transmitter with phase-controlled push –push quadrupler and stacked-FET power amplifier. IEEE Solid State Circuits Lett, 2021, 4, 150 doi: 10.1109/LSSC.2021.3108486
[13]	Liao X F, Zhao D X, You X H. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression. 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, 2021, 119 doi: 10.1109/ICTA53157.2021.9661881
[14]	Vehring S, Boeck G. Truly balanced K-band push-push frequency doubler. 2018 IEEE Radio Frequency Integrated Circuits Symposium, 2018, 348 doi: 10.1109/RFIC.2018.8428966
[15]	Chung W, Hong S. A 94-GHz push-push frequency doubler with peak total power efficiency of 16.28%. 2019 IEEE International Symposium on Radio-Frequency Integration Technology, 2019, 1 doi: 10.1109/RFIT.2019.8929163
[16]	Chung W, Kim C Y, Kim S S, et al. Design of 94-GHz highly efficient frequency octupler using 47-GHz current-reusing class-C frequency quadrupler. IEEE Trans Microwave Theory Tech, 2020, 68, 775 doi: 10.1109/TMTT.2019.2951149
[17]	Maas S A. Nonlinear microwave and RF circuits. Norwood, MA: Artech House, 2003
[18]	Zhong J C, Zhao D X. A 28-GHz 256-QAM power amplifier with weakly-coupled transformers in 65-nm CMOS. 2019 IEEE International Symposium on Radio-Frequency Integration Technology, 2019, 1 doi: 10.1109/RFIT.2019.8929205
[19]	Jiang Q Y, Pan Q. Analysis and design of tuning-less mm-wave injection-locked frequency dividers with wide locking range using 8th-order transformer-based resonator in 40 nm CMOS. IEEE J Solid State Circuits, 2022, in press doi: 10.1109/JSSC.2022.3152346
[20]	Vehring S, Ding Y S, Scholz P, et al. A 3.1-dBm E-band truly balanced frequency quadrupler in 22-nm FDSOI CMOS. IEEE Microwave Wirel Compon Lett, 2020, 30, 1165 doi: 10.1109/LMWC.2020.3028053
[21]	Lee K, Kim K, Shin G, et al. 65.6 –75.2-GHz phase-controlled push –push frequency quadrupler with 8.3% DC-to-RF efficiency in 40-nm CMOS. IEEE Microwave Wirel Compon Lett, 2021, 31, 579 doi: 10.1109/LMWC.2021.3068179
[22]	Ku B H, Chung H, Rebeiz G M. A milliwatt-level 70–110 GHz frequency quadrupler with >30 dBc harmonic rejection. IEEE Trans Microw Theory Tech, 2020, 68, 1697 doi: 10.1109/TMTT.2020.2967390

Fig. 1. (Color online) Phase noise performance of recent-published VCOs at 1 MHz.

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Fig. 2. The architecture of the proposed E-band frequency synthesizer.

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Fig. 3. The topology of (a) push-push doubler and (b) cascode structure.

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Fig. 4. (Color online) The simulation results of (a) output power and (b) conversion gain at 77-GHz.

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Fig. 5. (Color online) The drain current of M₁ with different input power and bias voltage.

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Fig. 6. (Color online) The simulation results of (a) output power and (b) conversion gain at 77-GHz with different bias.

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Fig. 7. (a) The block diagram of the proposed frequency quadrupler. The schematic of (b) frequency doubler and (c) power amplifier.

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Fig. 8. (Color online) (a) Z₂₁ and (b) S₂₁ of T₄ with different k.

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Fig. 9. The layouts of (a) T₂ and (b) T₄.

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Fig. 10. The equivalent circuit model of T₅.

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Fig. 11. (Color online) Simulated (a) S₂₁ of T₅ and (b) harmonics at the output node with and without the bandpass filter.

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Fig. 12. (Color online) Chip micrograph.

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Fig. 13. (Color online) Measured S-parameters: (a) S₁₁ and (b) S₂₂.

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Fig. 14. (Color online) Measurement results of (a) output power and (b) conversion gain.

DownLoad: Full-Size Img PowerPoint

Fig. 15. (Color online) Measured output power of the E-band quadrupler.

DownLoad: Full-Size Img PowerPoint

Fig. 16. (Color online) Measured phase noise at 77 GHz (red) and VCO phase noise at 19.25 GHz (blue).

DownLoad: Full-Size Img PowerPoint

Table 1. Performance comparison.

Parameter	MWCL 2020^[20]	MWCL 2021^[21]	TMTT 2020^[22]	This work
Technology	90 nm CMOS	40 nm CMOS	120 nm SiGe	40 nm CMOS
Output frequency (GHz)	71–81	65.6–75.2	70–110	74–82
Output power (dBm)	3.1	–0.2	3	1.7
Conversion gain (dB)	N/A	–8.9	–1.5	3.4
Fundamental suppression (dB)	>36	>33	>30	>45
P_DC (mW)	70	11.3	240	34
Core area (mm²)	0.52	0.1	1.9	0.23

DownLoad: CSV

[1]	Ma T K, Deng W, Chen Z P, et al. A CMOS 76–81-GHz 2-TX 3-RX FMCW radar transceiver based on mixed-mode PLL chirp generator. IEEE J Solid State Circuits, 2020, 55, 233 doi: 10.1109/JSSC.2019.2950184
[2]	Lin J F, Song Z, Qi N, et al. A 77-GHz mixed-mode FMCW signal generator based on Bang-Bang phase detector. IEEE J Solid State Circuits, 2018, 53, 2850 doi: 10.1109/JSSC.2018.2856248
[3]	Deng W, Jia H K, Chi B Y. Silicon-based FMCW signal generators: A review. J Semicond, 2020, 41(11), 1114018 doi: 10.1088/1674-4926/41/11/111401
[4]	Martins R, Lourenço N, Horta N, et al. Design of a 4.2-to-5.1 GHz ultralow-power complementary class-B/C hybrid-mode VCO in 65-nm CMOS fully supported by EDA tools. IEEE Trans Circuits Syst I, 2020, 67, 3965 doi: 10.1109/TCSI.2020.3009857
[5]	Haghi Kashani M, Molavi R, Mirabbasi S. A 2.3-mW 26.3-GHz G_m -boosted differential colpitts VCO with 20% tuning range in 65-nm CMOS. IEEE Trans Microwave Theory Tech, 2019, 67, 1556 doi: 10.1109/TMTT.2019.2899573
[6]	Mammei E, Monaco E, Mazzanti A, et al. A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension. 2013 IEEE International Solid-State Circuits Conference, 2013, 350 doi: 10.1109/ISSCC.2013.6487765
[7]	Liu X L, Chao Y, Luong H C. A 59-to-276-GHz CMOS signal generator using varactor-less VCO and dual-mode ILFD. IEEE J Solid State Circuits, 2021, 56, 2324 doi: 10.1109/JSSC.2020.3045741
[8]	Aghasi H, Cathelin A, Afshari E. A 0.92-THz SiGe power radiator based on a nonlinear theory for harmonic generation. IEEE J Solid State Circuits, 2017, 52, 406 doi: 10.1109/JSSC.2016.2627547
[9]	Nikpaik A, Masnadi Shirazi A H, Nabavi A, et al. A 219-to-231 GHz frequency-multiplier-based VCO with ~3% peak DC-to-RF efficiency in 65-nm CMOS. IEEE J Solid State Circuits, 2018, 53, 389 doi: 10.1109/JSSC.2017.2759116
[10]	Wu L, Liao S W, Xue Q. A 312-GHz CMOS injection-locked radiator with chip-and-package distributed antenna. IEEE J Solid State Circuits, 2017, 52, 2920 doi: 10.1109/JSSC.2017.2727046
[11]	Zhou Z B, Li W, Li N, et al. A wide locking range and low DC power injection-locked frequency tripler for K-band application. J Semicond, 2014, 35(12), 125008 doi: 10.1088/1674-4926/35/12/125008
[12]	Kim K, Lee K, Shin G, et al. A 50-Gb/s compact E-band transmitter with phase-controlled push –push quadrupler and stacked-FET power amplifier. IEEE Solid State Circuits Lett, 2021, 4, 150 doi: 10.1109/LSSC.2021.3108486
[13]	Liao X F, Zhao D X, You X H. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression. 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, 2021, 119 doi: 10.1109/ICTA53157.2021.9661881
[14]	Vehring S, Boeck G. Truly balanced K-band push-push frequency doubler. 2018 IEEE Radio Frequency Integrated Circuits Symposium, 2018, 348 doi: 10.1109/RFIC.2018.8428966
[15]	Chung W, Hong S. A 94-GHz push-push frequency doubler with peak total power efficiency of 16.28%. 2019 IEEE International Symposium on Radio-Frequency Integration Technology, 2019, 1 doi: 10.1109/RFIT.2019.8929163
[16]	Chung W, Kim C Y, Kim S S, et al. Design of 94-GHz highly efficient frequency octupler using 47-GHz current-reusing class-C frequency quadrupler. IEEE Trans Microwave Theory Tech, 2020, 68, 775 doi: 10.1109/TMTT.2019.2951149
[17]	Maas S A. Nonlinear microwave and RF circuits. Norwood, MA: Artech House, 2003
[18]	Zhong J C, Zhao D X. A 28-GHz 256-QAM power amplifier with weakly-coupled transformers in 65-nm CMOS. 2019 IEEE International Symposium on Radio-Frequency Integration Technology, 2019, 1 doi: 10.1109/RFIT.2019.8929205
[19]	Jiang Q Y, Pan Q. Analysis and design of tuning-less mm-wave injection-locked frequency dividers with wide locking range using 8th-order transformer-based resonator in 40 nm CMOS. IEEE J Solid State Circuits, 2022, in press doi: 10.1109/JSSC.2022.3152346
[20]	Vehring S, Ding Y S, Scholz P, et al. A 3.1-dBm E-band truly balanced frequency quadrupler in 22-nm FDSOI CMOS. IEEE Microwave Wirel Compon Lett, 2020, 30, 1165 doi: 10.1109/LMWC.2020.3028053
[21]	Lee K, Kim K, Shin G, et al. 65.6 –75.2-GHz phase-controlled push –push frequency quadrupler with 8.3% DC-to-RF efficiency in 40-nm CMOS. IEEE Microwave Wirel Compon Lett, 2021, 31, 579 doi: 10.1109/LMWC.2021.3068179
[22]	Ku B H, Chung H, Rebeiz G M. A milliwatt-level 70–110 GHz frequency quadrupler with >30 dBc harmonic rejection. IEEE Trans Microw Theory Tech, 2020, 68, 1697 doi: 10.1109/TMTT.2020.2967390

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Received: 09 March 2022 Revised: 16 April 2022 Online: Accepted Manuscript: 20 June 2022Uncorrected proof: 20 June 2022Published: 02 September 2022

Article Navigation > Journal of Semiconductors > 2022 > 43(9): 092401

Xiaofei Liao, Dixian Zhao, Xiaohu You. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression[J]. Journal of Semiconductors, 2022, 43(9): 092401. doi: 10.1088/1674-4926/43/9/092401 ****X F Liao, D X Zhao, X H You. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression[J]. J. Semicond, 2022, 43(9): 092401. doi: 10.1088/1674-4926/43/9/092401

Citation:

Xiaofei Liao, Dixian Zhao, Xiaohu You. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression[J]. Journal of Semiconductors, 2022, 43(9): 092401. doi: 10.1088/1674-4926/43/9/092401 ****

X F Liao, D X Zhao, X H You. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression[J]. J. Semicond, 2022, 43(9): 092401. doi: 10.1088/1674-4926/43/9/092401

Citation:

X F Liao, D X Zhao, X H You. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression[J]. J. Semicond, 2022, 43(9): 092401. doi: 10.1088/1674-4926/43/9/092401

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An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression

DOI: 10.1088/1674-4926/43/9/092401

Xiaofei Liao^{1, 2},
Dixian Zhao^{1, 2,},
Xiaohu You^{1, 2}

1.
National Mobile Communication Research Laboratory, Southeast University, Nanjing 211189, China
2.
Purple Mountain Laboratories, Nanjing 211111, China

More Information

Xiaofei Liao：received the B.Sc. degree in information science and engineering from Southeast University, Nanjing, China, in 2015, where she is currently pursuing the Ph.D. degree. Her current research interests include RF and millimeter-wave integrated circuits for wireless communications and radar systems
Dixian Zhao：(Member, IEEE) received the B.Sc. degree in microelectronics from Fudan University, Shanghai, China, in 2006, the M.Sc. degree in microelectronics from Delft University of Technology (TU Delft), the Netherlands, in 2009, and the Ph.D. degree in electrical engineering at University of Leuven (KU Leuven), Belgium, in 2015. Since April 2015, he has joined Southeast University, China, where he is now a Full Professor. His current research interests include millimeter-wave integrated circuits, transceivers and phased-array systems for 5G, satellite, radar and wireless power transfer applications
Xiaohu You：(Fellow, IEEE) received the M.S. and Ph.D. degrees in electrical engineering from Southeast University, Nanjing, China, in 1985 and 1988, respectively. Since 2013, he has been the Principal Investigator of China National 863 5G Project. He has contributed over 200 IEEE journal articles and two books in the areas of adaptive signal processing and neural networks and their applications to communication systems. His research interests include mobile communication systems and signal processing and its applications
Corresponding author: dixian.zhao@seu.edu.cn
Received Date: 2022-03-09
Revised Date: 2022-04-16

Available Online: 2022-06-20

Abstract

Abstract

This paper presents an E-band frequency quadrupler in 40-nm CMOS technology. The circuit employs two push–push frequency doublers and two single-stage neutralized amplifiers. The pseudo-differential class-B biased cascode topology is adopted for the frequency doubler, which improves the reverse isolation and the conversion gain. Neutralization technique is applied to increase the stability and the power gain of the amplifiers simultaneously. The stacked transformers are used for single-ended-to-differential transformation as well as output bandpass filtering. The output bandpass filter enhances the 4th-harmonic output power, while rejecting the undesired harmonics, especially the 2nd harmonic. The core chip is 0.23 mm² in size and consumes 34 mW. The measured 4th harmonic achieves a maximum output power of 1.7 dBm with a peak conversion gain of 3.4 dB at 76 GHz. The fundamental and 2nd-harmonic suppressions of over 45 and 20 dB are achieved for the spectrum from 74 to 82 GHz, respectively.
- capacitor neutralization,
- CMOS,
- E-band,
- frequency doubler,
- frequency quadrupler,
- push–push

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References(22)

References

[1]	Ma T K, Deng W, Chen Z P, et al. A CMOS 76–81-GHz 2-TX 3-RX FMCW radar transceiver based on mixed-mode PLL chirp generator. IEEE J Solid State Circuits, 2020, 55, 233 doi: 10.1109/JSSC.2019.2950184
[2]	Lin J F, Song Z, Qi N, et al. A 77-GHz mixed-mode FMCW signal generator based on Bang-Bang phase detector. IEEE J Solid State Circuits, 2018, 53, 2850 doi: 10.1109/JSSC.2018.2856248
[3]	Deng W, Jia H K, Chi B Y. Silicon-based FMCW signal generators: A review. J Semicond, 2020, 41(11), 1114018 doi: 10.1088/1674-4926/41/11/111401
[4]	Martins R, Lourenço N, Horta N, et al. Design of a 4.2-to-5.1 GHz ultralow-power complementary class-B/C hybrid-mode VCO in 65-nm CMOS fully supported by EDA tools. IEEE Trans Circuits Syst I, 2020, 67, 3965 doi: 10.1109/TCSI.2020.3009857
[5]	Haghi Kashani M, Molavi R, Mirabbasi S. A 2.3-mW 26.3-GHz G_m -boosted differential colpitts VCO with 20% tuning range in 65-nm CMOS. IEEE Trans Microwave Theory Tech, 2019, 67, 1556 doi: 10.1109/TMTT.2019.2899573
[6]	Mammei E, Monaco E, Mazzanti A, et al. A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension. 2013 IEEE International Solid-State Circuits Conference, 2013, 350 doi: 10.1109/ISSCC.2013.6487765
[7]	Liu X L, Chao Y, Luong H C. A 59-to-276-GHz CMOS signal generator using varactor-less VCO and dual-mode ILFD. IEEE J Solid State Circuits, 2021, 56, 2324 doi: 10.1109/JSSC.2020.3045741
[8]	Aghasi H, Cathelin A, Afshari E. A 0.92-THz SiGe power radiator based on a nonlinear theory for harmonic generation. IEEE J Solid State Circuits, 2017, 52, 406 doi: 10.1109/JSSC.2016.2627547
[9]	Nikpaik A, Masnadi Shirazi A H, Nabavi A, et al. A 219-to-231 GHz frequency-multiplier-based VCO with ~3% peak DC-to-RF efficiency in 65-nm CMOS. IEEE J Solid State Circuits, 2018, 53, 389 doi: 10.1109/JSSC.2017.2759116
[10]	Wu L, Liao S W, Xue Q. A 312-GHz CMOS injection-locked radiator with chip-and-package distributed antenna. IEEE J Solid State Circuits, 2017, 52, 2920 doi: 10.1109/JSSC.2017.2727046
[11]	Zhou Z B, Li W, Li N, et al. A wide locking range and low DC power injection-locked frequency tripler for K-band application. J Semicond, 2014, 35(12), 125008 doi: 10.1088/1674-4926/35/12/125008
[12]	Kim K, Lee K, Shin G, et al. A 50-Gb/s compact E-band transmitter with phase-controlled push –push quadrupler and stacked-FET power amplifier. IEEE Solid State Circuits Lett, 2021, 4, 150 doi: 10.1109/LSSC.2021.3108486
[13]	Liao X F, Zhao D X, You X H. An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression. 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, 2021, 119 doi: 10.1109/ICTA53157.2021.9661881
[14]	Vehring S, Boeck G. Truly balanced K-band push-push frequency doubler. 2018 IEEE Radio Frequency Integrated Circuits Symposium, 2018, 348 doi: 10.1109/RFIC.2018.8428966
[15]	Chung W, Hong S. A 94-GHz push-push frequency doubler with peak total power efficiency of 16.28%. 2019 IEEE International Symposium on Radio-Frequency Integration Technology, 2019, 1 doi: 10.1109/RFIT.2019.8929163
[16]	Chung W, Kim C Y, Kim S S, et al. Design of 94-GHz highly efficient frequency octupler using 47-GHz current-reusing class-C frequency quadrupler. IEEE Trans Microwave Theory Tech, 2020, 68, 775 doi: 10.1109/TMTT.2019.2951149
[17]	Maas S A. Nonlinear microwave and RF circuits. Norwood, MA: Artech House, 2003
[18]	Zhong J C, Zhao D X. A 28-GHz 256-QAM power amplifier with weakly-coupled transformers in 65-nm CMOS. 2019 IEEE International Symposium on Radio-Frequency Integration Technology, 2019, 1 doi: 10.1109/RFIT.2019.8929205
[19]	Jiang Q Y, Pan Q. Analysis and design of tuning-less mm-wave injection-locked frequency dividers with wide locking range using 8th-order transformer-based resonator in 40 nm CMOS. IEEE J Solid State Circuits, 2022, in press doi: 10.1109/JSSC.2022.3152346
[20]	Vehring S, Ding Y S, Scholz P, et al. A 3.1-dBm E-band truly balanced frequency quadrupler in 22-nm FDSOI CMOS. IEEE Microwave Wirel Compon Lett, 2020, 30, 1165 doi: 10.1109/LMWC.2020.3028053
[21]	Lee K, Kim K, Shin G, et al. 65.6 –75.2-GHz phase-controlled push –push frequency quadrupler with 8.3% DC-to-RF efficiency in 40-nm CMOS. IEEE Microwave Wirel Compon Lett, 2021, 31, 579 doi: 10.1109/LMWC.2021.3068179
[22]	Ku B H, Chung H, Rebeiz G M. A milliwatt-level 70–110 GHz frequency quadrupler with >30 dBc harmonic rejection. IEEE Trans Microw Theory Tech, 2020, 68, 1697 doi: 10.1109/TMTT.2020.2967390

An E-band CMOS frequency quadrupler with 1.7-dBm output power and 45-dB fundamental suppression

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