J. Semicond. > 2008, Volume 29 > Issue 8 > 1449-1452

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A Novel 4/5 Prescaler with Automatic Power Down

Zeng Longyue, Zhu Siqi and Yan Yuepeng

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Abstract: An "automatic power down" method is introduced to design a 4/5 prescaler,with the characteristic of making one of its D-flip-flops power down when it operates in divide-by-4 mode.Implemented with the TSMC 0.25μm mixed-signal CMOS process,the 4/5 MOS current mode logic prescaler is designed with this automatic power down technique.The simulation results show that the new 4/5 prescaler is immune to the "wake-up" issue and thereby retains the same maximum operating frequency as the conventional prescaler.An integer-N divider with this proposed prescaler and with the division ratio 66/67 is manufactured,and it is estimated to save more than 20% of the power compared with the conventional 4/5 prescaler.

Key words: MCML prescalerautomatic power downfrequency synthesizer

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    Zeng Longyue, Zhu Siqi, Yan Yuepeng. A Novel 4/5 Prescaler with Automatic Power Down[J]. Journal of Semiconductors, 2008, 29(8): 1449-1452.
    Zeng L Y, Zhu S Q, Yan Y P. A Novel 4/5 Prescaler with Automatic Power Down[J]. J. Semicond., 2008, 29(8): 1449.
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    Received: 18 August 2015 Revised: 17 April 2008 Online: Published: 01 August 2008

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      Zeng Longyue, Zhu Siqi, Yan Yuepeng. A Novel 4/5 Prescaler with Automatic Power Down[J]. Journal of Semiconductors, 2008, 29(8): 1449-1452. ****Zeng L Y, Zhu S Q, Yan Y P. A Novel 4/5 Prescaler with Automatic Power Down[J]. J. Semicond., 2008, 29(8): 1449.
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      Zeng Longyue, Zhu Siqi, Yan Yuepeng. A Novel 4/5 Prescaler with Automatic Power Down[J]. Journal of Semiconductors, 2008, 29(8): 1449-1452. ****
      Zeng L Y, Zhu S Q, Yan Y P. A Novel 4/5 Prescaler with Automatic Power Down[J]. J. Semicond., 2008, 29(8): 1449.

      A Novel 4/5 Prescaler with Automatic Power Down

      • Received Date: 2015-08-18
      • Accepted Date: 2007-12-27
      • Revised Date: 2008-04-17
      • Published Date: 2008-08-02

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