| Citation: |
Qiao Ming, Xiao Zhiqiang, Fang Jian, Zheng Xin, Zhou Xianda, Xu Jing, He Zhongbo, Duan Mingwei, Zhang Bo, Li Zhaoji. A High Voltage BCD Process Using Thin Epitaxial Technology[J]. Journal of Semiconductors, 2007, 28(11): 1742-1747.
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Qiao M, Xiao Z Q, Fang J, Zheng X, Zhou Xianda, Xu J, He Z B, Duan M W, Zhang B, Li Z J. A High Voltage BCD Process Using Thin Epitaxial Technology[J]. Chin. J. Semicond., 2007, 28(11): 1742.
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A High Voltage BCD Process Using Thin Epitaxial Technology
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Abstract
A high voltage BCD process using thin epitaxial technology is developed for high voltage applications.Compared to conventional thick expitaxial technology,the thickness of the n-type epitaxial layer is reduced to 9μm,and the diffusion processing time needed for forming junction isolation diffusions is substantially reduced.The isolation diffusions have a smaller lateral extent and occupy less chip area.High voltage double RESURF LDMOS with a breakdown voltage of up to 900V,as well as low voltage CMOS and BJT,are achieved using this high voltage BCD compatible process.An experimental high voltage half bridge gate drive IC using a coupled level shift structure is also successfully implemented,and the high side floating offset voltage in the half bridge drive IC is 880V.The major features of this process for high voltage applications are also clearly demonstrated.-
Keywords:
- BCD process,
- thin epitaxial technology,
- double RESURF,
- LDMOS
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References
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Proportional views
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