Chin. J. Semicond. > 2006, Volume 27 > Issue 11 > 1900-1905

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Investigations of Key Technologies for 100V HVCMOS Process

Song Limei, Li Hua, Du Huan, Xia Yang, Han Zhengsheng and Hai Chaohe

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Abstract: A novel dual gate oxide (DGO) process is proposed to improve the performance of high voltage CMOS (HVCMOS) devices and the compatibility between thick gate oxide devices and thin gate oxide devices.An extra sidewall is added in this DGO process to round off the step formed after etching the thick gate oxide and poly-silicon.The breakdown voltages of high voltage nMOS (HVnMOS) and high voltage pMOS (HVpMOS) are 168 and -158V,respectively.Excellent performances are realized for both HVnMOS and HVpMOS devices.Experimental results demonstrate that the HVCMOS devices work safely at an operation voltage of 100V.

Key words: HVCMOSDGOcompatibility

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    Received: 18 August 2015 Revised: Online: Published: 01 November 2006

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      Song Limei, Li Hua, Du Huan, Xia Yang, Han Zhengsheng, Hai Chaohe. Investigations of Key Technologies for 100V HVCMOS Process[J]. Journal of Semiconductors, 2006, 27(11): 1900-1905. ****Song L M, Li H, Du H, Xia Y, Han Z S, Hai C H. Investigations of Key Technologies for 100V HVCMOS Process[J]. Chin. J. Semicond., 2006, 27(11): 1900.
      Citation:
      Song Limei, Li Hua, Du Huan, Xia Yang, Han Zhengsheng, Hai Chaohe. Investigations of Key Technologies for 100V HVCMOS Process[J]. Journal of Semiconductors, 2006, 27(11): 1900-1905. ****
      Song L M, Li H, Du H, Xia Y, Han Z S, Hai C H. Investigations of Key Technologies for 100V HVCMOS Process[J]. Chin. J. Semicond., 2006, 27(11): 1900.

      Investigations of Key Technologies for 100V HVCMOS Process

      • Received Date: 2015-08-18

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