Use of the epitaxial MTBs as a 1D gate (<i>L</i><sub>g</sub> = 0.4 nm) for the construction of scaling down two-dimensional field-effect transistors

Youla Yang; Daixuan Wu; He Tian; Tian-Ling Ren

doi:10.1088/1674-4926/24070013

J. Semicond. > 2024, Volume 45 > Issue 10 > 100401

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Use of the epitaxial MTBs as a 1D gate (L_g = 0.4 nm) for the construction of scaling down two-dimensional field-effect transistors

Youla Yang¹, Daixuan Wu^{1, 2,}, He Tian^1, and Tian-Ling Ren^1,

+ Author Affiliations

1. School of Integrated Circuit, Tsinghua University, Beijing 100083, China
2. School of Instrument Science and Technology, Xi'an Jiaotong University, Xi'an 710049, China

Author Bio:

Youla Yang received her bachelor’s degree in 2024 from Tsinghua University. Her undergraduate majors are Mathematical Sciences and Materials Science & Engineering. Now she is a graduate student in the School of Integrated Circuit, Tsinghua University, under the supervision of Prof. Tian-Ling Ren.

Daixuan Wu received her Ph.D degree in Electrical and Systems Engineering from University of Pennsylvania, USA in 2023. She serves as a supervisor for graduate students in the school of mechanical engineering in Xi'an Jiaotong University. Her current research fields include MEMS sensors, material science, superconducting devices and optical fiber sensors.

He Tian received his Ph.D. degree from the Institute of Microelectronics, Tsinghua University in 2015. He is currently a Tenured Associate Professor and Deputy Director at Institute of Integrated Electronics, School of Integrated Circuits, Tsinghua University. He is the recipient of the National Outstanding Youth Foundation. His current research interest includes various 2D material-based devices.

Tian-Ling Ren, Vice Dean of the School of Information Science and Technology at Tsinghua University, Changjiang Scholar Distinguished Professor appointed by the Ministry of Education, recipient of the National Science Fund for Distinguished Young Scholars, and Vice Director of the Environmental and Health Sensing Technology Research Center at Tsinghua University.

Corresponding author: Daixuan Wu, Xymems@stu.xjtu.edu.cn; He Tian, tianhe88@tsinghua.edu.cn; Tian-Ling Ren, RenTL@tsinghua.edu.cn

DOI: 10.1088/1674-4926/24070013CSTR: 32376.14.1674-4926.24070013

References

[1]	Rajan A, Buchberger S, Edwards B, et al. Epitaxial growth of large-area monolayers and van der waals heterostructures of transition-metal chalcogenides via assisted nucleation. Adv Mater, 2024, 2402254 doi: 10.1002/adma.202402254
[2]	Sarkar D, Som A, Unni K, et al. Interfacial growth of large area single-crystalline silver sheets through ambient microdroplets. Small, 2024, 2400159 doi: 10.1002/smll.202400159
[3]	Xin Z Q, Zhang X L, Guo J, et al. Dual-limit growth of large-area monolayer transition metal dichalcogenides. ACS Nano, 2024, 18, 7391 doi: 10.1021/acsnano.3c09222
[4]	Ahn H, Moon G, Jung H G, et al. Integrated 1D epitaxial mirror twin boundaries for ultrascaled 2D MoS₂ field-effect transistors. Nat Nanotechnol, 2024, 19, 955 doi: 10.1038/s41565-024-01706-1
[5]	Radamson H H, Miao Y H, Zhou Z W, et al. CMOS scaling for the 5 nm node and beyond: Device, process and technology. Nanomaterials, 2024, 14, 837 doi: 10.3390/nano14100837
[6]	Desai S B, Madhvapathy S R, Sachid A B, et al. MoS₂ transistors with 1-nanometer gate lengths. Science, 2016, 354(6308), 99 doi: 10.1126/science.aah4698
[7]	Wu F, Tian H, Shen Y, et al. Vertical MoS₂ transistors with sub-1-nm gate lengths. Nature, 2022, 603(7900), 259 doi: 10.1038/s41586-021-04323-3
[8]	Xu Y S, Liu T, Liu K L, et al. Scalable integration of hybrid high-κ dielectric materials on two-dimensional semiconductors. Nat Mater, 2023, 22, 1078 doi: 10.1038/s41563-023-01626-w

Fig. 1. (Color online) Schematics of FETs with MoS₂ MTBs as 1D local gates. A gate stack consisting of MTB and an Al₂O₃ dielectric layer (5 nm thick, deposited via electron-beam evaporation) was positioned beneath a single-crystal MoS₂ monolayer channel (approximately 600 nm in length), which was connected to bismuth source (S) and drain (D) contacts to establish an ohmic contact^[4].

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[1]	Rajan A, Buchberger S, Edwards B, et al. Epitaxial growth of large-area monolayers and van der waals heterostructures of transition-metal chalcogenides via assisted nucleation. Adv Mater, 2024, 2402254 doi: 10.1002/adma.202402254
[2]	Sarkar D, Som A, Unni K, et al. Interfacial growth of large area single-crystalline silver sheets through ambient microdroplets. Small, 2024, 2400159 doi: 10.1002/smll.202400159
[3]	Xin Z Q, Zhang X L, Guo J, et al. Dual-limit growth of large-area monolayer transition metal dichalcogenides. ACS Nano, 2024, 18, 7391 doi: 10.1021/acsnano.3c09222
[4]	Ahn H, Moon G, Jung H G, et al. Integrated 1D epitaxial mirror twin boundaries for ultrascaled 2D MoS₂ field-effect transistors. Nat Nanotechnol, 2024, 19, 955 doi: 10.1038/s41565-024-01706-1
[5]	Radamson H H, Miao Y H, Zhou Z W, et al. CMOS scaling for the 5 nm node and beyond: Device, process and technology. Nanomaterials, 2024, 14, 837 doi: 10.3390/nano14100837
[6]	Desai S B, Madhvapathy S R, Sachid A B, et al. MoS₂ transistors with 1-nanometer gate lengths. Science, 2016, 354(6308), 99 doi: 10.1126/science.aah4698
[7]	Wu F, Tian H, Shen Y, et al. Vertical MoS₂ transistors with sub-1-nm gate lengths. Nature, 2022, 603(7900), 259 doi: 10.1038/s41586-021-04323-3
[8]	Xu Y S, Liu T, Liu K L, et al. Scalable integration of hybrid high-κ dielectric materials on two-dimensional semiconductors. Nat Mater, 2023, 22, 1078 doi: 10.1038/s41563-023-01626-w