Citation: |
Xinyu Shen, Zhao Zhang, Jie Yang, Jian Liu, Nanjian Wu, Mohamad Sawan, Liyuan Liu. A 0.0012-mm2 0.66-pJ/bit BPSK demodulator incorporating a loop-filter-less PLL achieving the maximum data rate of fcarrier/2[J]. Journal of Semiconductors, 2025, In Press. doi: 10.1088/1674-4926/24100022
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X Y Shen, Z Zhang, J Yang, J Liu, N J Wu, M Sawan, and L Y Liu, A 0.0012-mm2 0.66-pJ/bit BPSK demodulator incorporating a loop-filter-less PLL achieving the maximum data rate of fcarrier/2[J]. J. Semicond., 2025, accepted doi: 10.1088/1674-4926/24100022
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A 0.0012-mm2 0.66-pJ/bit BPSK demodulator incorporating a loop-filter-less PLL achieving the maximum data rate of fcarrier/2
DOI: 10.1088/1674-4926/24100022
CSTR: 32376.14.1674-4926.24100022
More Information-
Abstract
This paper presents a compact ultra-low-power phase-locked loop (PLL) based binary phase-shift keying (BPSK) demodulator. The loop-filter-less (LPF-less) PLL is proposed to make phase of PLL output carrier signal track the phase of BPSK signal in real time. Thus, the maximum date rate can be significantly extended to the half of the carrier frequency (fcarrier) with a very compact size compared to prior PLL-based BPSK demodulators. Furthermore, eliminating all the static power in our LPF-less PLL, the energy efficiency is obviously improved. Fabricated in a 40-nm CMOS process, our prototype occupies 0.0012-mm2 core active area, and achieves the maximum data rate of 6.78 Mb/s (fcarrier/2) at fcarrier of 13.56 MHz. The power consumption and energy efficiency is 4.47 μW and 0.66 pJ/bit at 6.78-Mb/s data rate, respectively.-
Keywords:
- BPSK,
- PLL,
- loop filter,
- compact,
- low-power,
- demodulator,
- wireless power transmission (WPT).
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References
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