Abstract: This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optic-fiber receivers.In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier.The experimental results indicate that,with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0.8mVpp input.Furthermore,an isolation structure combined with a p+ guard-ring (PGR),an n+ guard-ring (NGR),and a deep-n-well (DNW) for parallel amplifier is also presented.Taking this combined structure,the crosstalk and the substrate noise coupling have been effectively reduced.Compared with the isolation of PGR or PGR+NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8.1dB at 1GHz,and by 8.1 and 2.5dB at 2GHz,respectively.With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W

Key words: parallel optic-fiber receiver, front-end amplifier, regulated-cascode, substrate noise coupling, isolation