Chin. J. Semicond. > 2004, Volume 25 > Issue 5 > 520-525
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采用精确时延模型基于路径的缓冲器插入时延优化(英文)

张轶谦 , 周强 , 洪先龙 and 蔡懿慈

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Key words: 缓冲器插入, 时延优化, 互连规划, 布线算法

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    Received: 19 August 2015 Revised: Online: Published: 01 May 2004

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      Article Navigation >  Journal of Semiconductors  > 2004  >  25(5): 520-525
      张轶谦, 周强, 洪先龙, 蔡懿慈. 采用精确时延模型基于路径的缓冲器插入时延优化(英文)[J]. 半导体学报(英文版), 2004, 25(5): 520-525.
      Citation:
      张轶谦, 周强, 洪先龙, 蔡懿慈. 采用精确时延模型基于路径的缓冲器插入时延优化(英文)[J]. 半导体学报(英文版), 2004, 25(5): 520-525.
      shu

      • Received Date: 2015-08-19

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