Chin. J. Semicond. > 2006, Volume 27 > Issue S1 > 392-395

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Direct Bonded SOI Wafers Technology

Huang Chenhung and Chiou Herngde

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Abstract: This paper reports the direct bonded SOI wafers technology.It discusses how the wafer cleanliness and surface flatness result in the voids of bonded SOI wafers.By growing oxide on different layer of bonded wafers,we demonstrate the warpage variation.Dimples on wafers results in the bonding voids,which can be inspected by infrared light.

Key words: bonded wafersSOIvoids

1

Novel SOI double-gate MOSFET with a P-type buried layer

Yao Guoliang, Luo Xiaorong, Wang Qi, Jiang Yongheng, Wang Pei, et al.

Journal of Semiconductors, 2012, 33(5): 054006. doi: 10.1088/1674-4926/33/5/054006

2

Tunable filters based on an SOI nano-wire waveguide micro ring resonator

Li Shuai, Wu Yuanda, Yin Xiaojie, An Junming, Li Jianguang, et al.

Journal of Semiconductors, 2011, 32(8): 084007. doi: 10.1088/1674-4926/32/8/084007

3

Process optimization of a deep trench isolation structure for high voltage SOI devices

Zhu Kuiying, Qian Qinsong, Zhu Jing, Sun Weifeng

Journal of Semiconductors, 2010, 31(12): 124009. doi: 10.1088/1674-4926/31/12/124009

4

A new integrated SOI power device based on self-isolation technology

Gao Huanmei, Luo Xiaorong, Zhang Wei, Deng Hao, Lei Tianfei, et al.

Journal of Semiconductors, 2010, 31(8): 084012. doi: 10.1088/1674-4926/31/8/084012

5

A three-dimensional breakdown model of SOI lateral power transistors with a circular layout

Guo Yufeng, Wang Zhigong, Sheu Gene

Journal of Semiconductors, 2009, 30(11): 114006. doi: 10.1088/1674-4926/30/11/114006

6

Total Dose Irradiation of FD SOI NMOSFET UnderDifferent Bias Configurations

Wang Ningjuan, Liu Zhongli, Li Ning, Yu Fang, Li Guohua, et al.

Chinese Journal of Semiconductors , 2007, 28(5): 750-754.

7

Dual Material Gate SOI MOSFET with a Single Halo

Li Zunchao, Jiang Yaolin, Wu Jianmin

Chinese Journal of Semiconductors , 2007, 28(3): 327-331.

8

Fabrication of a Novel SOI Material with Non-Planar Buried Oxide Layer

Guo Yufeng, Li Zhaoji, Zhang Bo, Liu Yong

Chinese Journal of Semiconductors , 2007, 28(9): 1415-1419.

9

Fabrication of Monolithic Silicon Multi-Sensor on SOI Wafer

Xu Jingbo, Zhao Yulong, Jiang Zhuangde, Zhang Dacheng, Yang Fang, et al.

Chinese Journal of Semiconductors , 2007, 28(2): 302-307.

10

Design and Optimization of SOI Piezoresistive MicrocantileverSensors for Use in Surface Stress Measurement

Zhuang Zhiwei, Wang Zheyao, Liu Litian

Chinese Journal of Semiconductors , 2006, 27(10): 1844-1850.

11

An Analytical Expression of Free Carrier Lifetime in an SOI Rib Waveguide Used for Raman Amplification

Chen Mingyi, Mao Luhong, Hao Xianren, Zhang Shilin, Guo Weilian, et al.

Chinese Journal of Semiconductors , 2006, 27(7): 1310-1315.

12

A Highly Heat-Dissipating SOI High Voltage Power Device with a Variable k Dielectric Buried Layer

Luo Xiaorong, Li Zhaoji, Zhang Bo

Chinese Journal of Semiconductors , 2006, 27(10): 1832-1837.

13

An ADI Method for the Breakdown Voltage Analysis of Thin-Film SOI RESURF Structure with the High-Order Compact Finite Difference

Yu Zongguang, Liu Zhan, Wang Guozhang, Xu Ziming

Chinese Journal of Semiconductors , 2006, 27(2): 354-357.

14

Study on the Characteristics of SOI DTMOS with Reverse Schottky Barriers

Bi Jinshun, Hai Chaohe

Chinese Journal of Semiconductors , 2006, 27(9): 1526-1530.

15

SOI MOSFET Model Parameter Extraction via a Compound Genetic Algorithm

Li Ruizhen, Li Duoli, Du Huan, Hai Chaohe, Han Zhengsheng, et al.

Chinese Journal of Semiconductors , 2006, 27(5): 796-803.

16

Fabrication of SOI Material Using Low Temperature Bonding Technology

Zhan Da, Ma Xiaobo, Liu Weili, Song Zhitang, Feng Songlin, et al.

Chinese Journal of Semiconductors , 2006, 27(S1): 189-192.

17

Study of Improved Performance of SOI Devices and Circuits

Hai Chaohe, Han Zhengsheng, Zhou Xiaoyin, Zhao Lixin, Li Duoli, et al.

Chinese Journal of Semiconductors , 2006, 27(S1): 322-327.

18

Characteristics of a 0.1μm SOI Grooved Gate pMOSFET

Shao Hongxu, Sun Baogang, Wu Junfeng, Zhong Xinghua

Chinese Journal of Semiconductors , 2005, 26(11): 2080-2084.

19

A High Breakdown Voltage Thin SOI Device with a Vertically Linearly Graded Concentration Drift Region

Lu Shengli, Sun Zhilin, Sun Weifeng, Shi Longxing

Chinese Journal of Semiconductors , 2005, 26(12): 2286-2289.

20

A Modified DSOI Device

JIANG Bo, HE Ping, TIAN Li-lin, LIN Xi

Chinese Journal of Semiconductors , 2002, 23(9): 966-971.

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    Received: 20 August 2015 Revised: Online: Published: 01 December 2006

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      Huang Chenhung, Chiou Herngde. Direct Bonded SOI Wafers Technology[J]. Journal of Semiconductors, 2006, 27(S1): 392-395. ****Huang C H N, Chiou H. Direct Bonded SOI Wafers Technology[J]. Chin. J. Semicond., 2006, 27(13): 392.
      Citation:
      Huang Chenhung, Chiou Herngde. Direct Bonded SOI Wafers Technology[J]. Journal of Semiconductors, 2006, 27(S1): 392-395. ****
      Huang C H N, Chiou H. Direct Bonded SOI Wafers Technology[J]. Chin. J. Semicond., 2006, 27(13): 392.

      Direct Bonded SOI Wafers Technology

      • Received Date: 2015-08-20

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