Simulation of a Double-Gate Dynamic Threshold Voltage Fully Depleted Silicon-on-Insulator nMOSFET

Bi Jinshun; Wu Junfeng; Hai Chaohe

Chin. J. Semicond. > 2006, Volume 27 > Issue 1 > 35-40

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Simulation of a Double-Gate Dynamic Threshold Voltage Fully Depleted Silicon-on-Insulator nMOSFET

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Abstract: A novel planar DGDT FDSOI nMOSFET is presented,and the operation mechanism is discussed.The device fabrication processes and characteristics are simulated with Tsuprem 4 and Medici.The back-gate n-well is formed by implantation of phosphorus at a dosage of 3×10¹³cm^-2 and an energy of 250keV and connected directly to a front-gate n+ polysilicon.This method is completely compatible with the conventional bulk silicon process.Simulation results show that a DGDT FDSOI nMOSFET not only retains the advantages of a conventional FDSOI nMOSFET over a partially depleted (PD) SOI nMOSFET--that is the avoidance of anomalous subthreshold slope and kink effects but also shows a better drivability than a conventional FDSOI nMOSFET.

Key words: double-gate structure, dynamic threshold, FDSOI, nMOSFET

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Received: 20 August 2015 Revised: Online: Published: 01 January 2006

A novel planar DGDT FDSOI nMOSFET is presented,and the operation mechanism is discussed.The device fabrication processes and characteristics are simulated with Tsuprem 4 and Medici.The back-gate n-well is formed by implantation of phosphorus at a dosage of 3×10¹³cm^-2 and an energy of 250keV and connected directly to a front-gate n+ polysilicon.This method is completely compatible with the conventional bulk silicon process.Simulation results show that a DGDT FDSOI nMOSFET not only retains the advantages of a conventional FDSOI nMOSFET over a partially depleted (PD) SOI nMOSFET--that is the avoidance of anomalous subthreshold slope and kink effects but also shows a better drivability than a conventional FDSOI nMOSFET.

Simulation of a Double-Gate Dynamic Threshold Voltage Fully Depleted Silicon-on-Insulator nMOSFET

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