J. Semicond. > 2014, Volume 35 > Issue 2 > 024001
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SEMICONDUCTOR DEVICES

Temperature dependent IDS-VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate

Yan Liu, Jing Yan, Hongjuan Wang and Genquan Han

+ Author Affiliations

 Corresponding author: Han Genquan, hangenquan@ieee.org, hangenquan@cqu.edu.cn

DOI: 10.1088/1674-4926/35/2/024001

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Abstract: We fabricated n-type Si-based TFETs with a Ge source on Si(110) substrate. The temperature dependent IDS-VGS characteristics of a TFET formed on Si(110) are investigated in the temperature range of 210 to 300 K. A study of the temperature dependence of $I_{\rm Leakage}$ indicates that $I_{\rm Leakage}$ is mainly dominated by the Shockley-Read-Hall (SRH) generation-recombination current of the n+ drain-Si substrate junction. $I_{\rm ON}$ increases monotonically with temperature, which is attributed to a reduction of the bandgap at the tunneling junction and an enhancement of band-to-band tunneling rate. The subthreshold swing S for trap assisted tunneling (TAT) current and band-to-band tunneling (BTBT) current shows the different temperature dependence. The subthreshold swing S for the TAT current degrades with temperature, while the S for BTBT current is temperature independent.

Key words: tunneling field-effect-transistor, band-to-band tunneling, germanium, tunneling, temperature



[1]
Hu C, Patel P, Bowonder A, et al. Prospect of tunneling green transistor for 0. 1 V CMOS. IEEE International Electron Devices Meeting (IEDM), 2010: 387 http://nano.eecs.berkeley.edu/publications/IEDM_2010_TFET.pdf
[2]
Ionescu A M, Riel H. Tunnel field-effect transistors as energy-efficient electronic switches. Nature, 2011, 479:329 doi: 10.1038/nature10679
[3]
Han G, Guo P, Yang Y, et al. Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate. Appl Phys Lett, 2011, 98:153502 doi: 10.1063/1.3579242
[4]
Yang Y, Su S, Guo P, et al. Towards direct band-to-band tunneling in p-channel tunneling field effect transistor (TFET): technology enablement by germanium-tin (GeSn). IEEE International Electron Devices Meeting (IEDM), 2012: 379 http://ieeexplore.ieee.org/document/6479053/l
[5]
Han G, Guo P, Yang Y, et al. Source engineering for tunnel field-effect transistor:elevated source with vertical silicon-germanium/germanium heterostructure. Jpn J Appl Phys, 2011, 50:04DJ07 doi: 10.1143/JJAP.50.04DJ07/pdf
[6]
Guo P F, Yang L T, Yang Y, et al. Tunneling field effect transistor:effect of strain and temperature on tunneling current. IEEE Electron Device Lett, 2009, 30:981 doi: 10.1109/LED.2009.2026296
[7]
Liu Y, Wang H, Yan J, et al. Silicon tunnel field-effect transistor with in situ doped single crystalline Ge source for achieving sub-60 mV/decade subthreshold swing. Chin Phys Lett, 2013, 30:088502 doi: 10.1088/0256-307X/30/8/088502
[8]
Jeon K, Loh W Y, Patel P, et al. Si tunnel transistors with a novel silicided source and 46 mV/dec swing. Symposium on VLSI Technology, 2010: 121 http://ieeexplore.ieee.org/document/5556195/
[9]
Han G, Yee Y S, Guo P, et al. Enhancement of TFET performance using dopant profile steepening implant and source dopant concentration engineering at tunneling junction. Silicon Nanoelectronics Workshop, 2010 http://ieeexplore.ieee.org/document/5562594/
[10]
Toh E H, Wang G H, Chan L, et al. Device design and scalability of a double-gate tunneling field-effect transistor with silicon-germanium source. Jpn J Appl Phys, 2007, 46:2593 doi: 10.1143/JJAP.47.2593/meta
[11]
Knoch J, Appenzeller J. Modeling of high-performance p-type Ⅲ-Ⅴ heterojunction tunnel FETs. IEEE Electron Device Lett, 2010, 31:305 doi: 10.1109/LED.2010.2041180
[12]
Mookerjea S, Mohata D, Mayer T, et al. Temperature-dependent Ⅳ characteristics of a vertical In0. 53Ga0. 47As tunnel FET. IEEE Electron Device Lett, 2010, 31: 564 http://www.ndcl.ee.psu.edu/papers/75_Mookerjea_EDL_2010.pdf
[13]
Kane E O. Zener tunneling in semiconductors. J Phys Chem Solids, 1960, 12:181 doi: 10.1016/0022-3697(60)90035-4
[14]
Zhang Q, Zhao W, Seabaugh A. Analytic expression and approach for low-subthreshold-swing tunnel transistors. Device Research Conference Digest, 2005: 161 http://ieeexplore.ieee.org/document/1553102/
Fig. 1.  (a) Schematic of a TFET with a Ge:B source and an L-shaped channel formed on Si substrate. (b) Schematic top view of the TFET.

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Fig. 2.  Depth profile for B in a Ge:B source grown on Si(110), as obtained using secondary ion mass spectrometry. The hole concentration was determined by Hall measurement. The B concentration gradient in the Ge:B/Si(110) stack is 1.4 nm/decade.

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Fig. 3.  (a) $I_{\rm DS}$-$V_{\rm GS}$ curves of a TFET with a Ge source fabricated on Si(110) substrate. (b) $I_{\rm DS}$-$V_{\rm DS}$ curves of the same device, where $V_{\rm GS}$ is varied in steps of 0.5 V.

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Fig. 4.  $I_{\rm DS}$-$V_{\rm GS}$ of a TFET formed on Si(110) measured at the temperature range 210 to 300 K in steps of 30 K, showing the temperature dependence of $I_{\rm DS}$.

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Fig. 5.  Arrhenius plot of ln($I_{\rm Leakage}/T^{3/2})$ versus 1/$kT$ showing an activation energy of 0.53 eV, which corresponds to the half bandgap of Si:As, considering the bandgap narrowing effect. This indicates that the SRH current of a reverse biased drain-substrate junction is the dominant current of $I_{\rm Leakage}$.

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Fig. 6.  (a) $I_{\rm ON}$ at $V_{\rm GS}$ $=$ 2 V versus temperature, showing $I_{\rm ON}$ increases from 210 to 300 K, resulting from an enhancement of BTBT current. (b) Increasing rate of $I_{\rm DS}$ versus $V_{\rm GS}$ at different $V_{\rm DS}$ and temperatures. The increasing rate decreases with $V_{\rm GS}$, $V_{\rm DS}$ and temperature.

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Fig. 7.  S versus temperature. The average S for TAT current increases with the temperature. And the average S for BTBT current maintains a constant from 210 to 270 K.

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[1]
Hu C, Patel P, Bowonder A, et al. Prospect of tunneling green transistor for 0. 1 V CMOS. IEEE International Electron Devices Meeting (IEDM), 2010: 387 http://nano.eecs.berkeley.edu/publications/IEDM_2010_TFET.pdf
[2]
Ionescu A M, Riel H. Tunnel field-effect transistors as energy-efficient electronic switches. Nature, 2011, 479:329 doi: 10.1038/nature10679
[3]
Han G, Guo P, Yang Y, et al. Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate. Appl Phys Lett, 2011, 98:153502 doi: 10.1063/1.3579242
[4]
Yang Y, Su S, Guo P, et al. Towards direct band-to-band tunneling in p-channel tunneling field effect transistor (TFET): technology enablement by germanium-tin (GeSn). IEEE International Electron Devices Meeting (IEDM), 2012: 379 http://ieeexplore.ieee.org/document/6479053/l
[5]
Han G, Guo P, Yang Y, et al. Source engineering for tunnel field-effect transistor:elevated source with vertical silicon-germanium/germanium heterostructure. Jpn J Appl Phys, 2011, 50:04DJ07 doi: 10.1143/JJAP.50.04DJ07/pdf
[6]
Guo P F, Yang L T, Yang Y, et al. Tunneling field effect transistor:effect of strain and temperature on tunneling current. IEEE Electron Device Lett, 2009, 30:981 doi: 10.1109/LED.2009.2026296
[7]
Liu Y, Wang H, Yan J, et al. Silicon tunnel field-effect transistor with in situ doped single crystalline Ge source for achieving sub-60 mV/decade subthreshold swing. Chin Phys Lett, 2013, 30:088502 doi: 10.1088/0256-307X/30/8/088502
[8]
Jeon K, Loh W Y, Patel P, et al. Si tunnel transistors with a novel silicided source and 46 mV/dec swing. Symposium on VLSI Technology, 2010: 121 http://ieeexplore.ieee.org/document/5556195/
[9]
Han G, Yee Y S, Guo P, et al. Enhancement of TFET performance using dopant profile steepening implant and source dopant concentration engineering at tunneling junction. Silicon Nanoelectronics Workshop, 2010 http://ieeexplore.ieee.org/document/5562594/
[10]
Toh E H, Wang G H, Chan L, et al. Device design and scalability of a double-gate tunneling field-effect transistor with silicon-germanium source. Jpn J Appl Phys, 2007, 46:2593 doi: 10.1143/JJAP.47.2593/meta
[11]
Knoch J, Appenzeller J. Modeling of high-performance p-type Ⅲ-Ⅴ heterojunction tunnel FETs. IEEE Electron Device Lett, 2010, 31:305 doi: 10.1109/LED.2010.2041180
[12]
Mookerjea S, Mohata D, Mayer T, et al. Temperature-dependent Ⅳ characteristics of a vertical In0. 53Ga0. 47As tunnel FET. IEEE Electron Device Lett, 2010, 31: 564 http://www.ndcl.ee.psu.edu/papers/75_Mookerjea_EDL_2010.pdf
[13]
Kane E O. Zener tunneling in semiconductors. J Phys Chem Solids, 1960, 12:181 doi: 10.1016/0022-3697(60)90035-4
[14]
Zhang Q, Zhao W, Seabaugh A. Analytic expression and approach for low-subthreshold-swing tunnel transistors. Device Research Conference Digest, 2005: 161 http://ieeexplore.ieee.org/document/1553102/

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    Received: 21 July 2013 Revised: 30 August 2013 Online: Published: 01 February 2014

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      Article Navigation >  Journal of Semiconductors  > 2014  >  35(2): 024001
      Yan Liu, Jing Yan, Hongjuan Wang, Genquan Han. Temperature dependent IDS-VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate[J]. Journal of Semiconductors, 2014, 35(2): 024001. doi: 10.1088/1674-4926/35/2/024001 ****Y Liu, J Yan, H J Wang, G Q Han. Temperature dependent IDS-VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate[J]. J. Semicond., 2014, 35(2): 024001. doi: 10.1088/1674-4926/35/2/024001.
      Citation:
      Yan Liu, Jing Yan, Hongjuan Wang, Genquan Han. Temperature dependent IDS-VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate[J]. Journal of Semiconductors, 2014, 35(2): 024001. doi: 10.1088/1674-4926/35/2/024001 ****
      Y Liu, J Yan, H J Wang, G Q Han. Temperature dependent IDS-VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate[J]. J. Semicond., 2014, 35(2): 024001. doi: 10.1088/1674-4926/35/2/024001.
      shu

      Temperature dependent IDS-VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate

      DOI: 10.1088/1674-4926/35/2/024001

      • Key Laboratory of Optoelectronic Technology and Systems of the Education Ministry of China, College of Optoelectronic Engineering, Chongqing University, Chongqing 400044, China

      Funds:

      Project supported by the Fundamental Research Funds for the Central Universities (Nos. 106112013CDJZR120015, 106112013CDJZR120017)

      the Fundamental Research Funds for the Central Universities 106112013CDJZR120017

      the Fundamental Research Funds for the Central Universities 106112013CDJZR120015

      More Information
      • Corresponding author: Han Genquan, hangenquan@ieee.org, hangenquan@cqu.edu.cn
      • Received Date: 2013-07-21
      • Revised Date: 2013-08-30
      • Published Date: 2014-02-01

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