Numerical Analysis of Characterized Back Interface Traps of SOI Devices by R-G Current
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Chin. J. Semicond. 2000, 21(12): 1152
A New Method for Optimizing Layout Parameter ofan Integrated On- Chip Inductor in CMOS RF IC's
Chin. J. Semicond. 2000, 21(12): 1157
Circuit Design of On-Chip BP Learning Neural Network with Programmable Neuron Characteristics
Chin. J. Semicond. 2000, 21(12): 1164
Chin. J. Semicond. 2000, 21(12): 1170
Chin. J. Semicond. 2000, 21(12): 1177
Chin. J. Semicond. 2000, 21(12): 1183
Chin. J. Semicond. 2000, 21(12): 1189
Chin. J. Semicond. 2000, 21(12): 1193
Determination of Threshold Voltage and Mobility of MOSFET by Proportional Difference Operator
Chin. J. Semicond. 2000, 21(12): 1198
Chin. J. Semicond. 2000, 21(12): 1203
SiGe/SiHBT发射结的寄生势垒及其对器件室温和低温特性的影响
Chin. J. Semicond. 2000, 21(12): 1208
Chin. J. Semicond. 2000, 21(12): 1214
Chin. J. Semicond. 2000, 21(12): 1220
Chin. J. Semicond. 2000, 21(12): 1224
Chin. J. Semicond. 2000, 21(12): 1228