Large-area perovskite solar cell modules efficiency remains lower than small-area devices, perovskite crystallization between small and large areas difference could be one reason. Previously, diluted solution was often used to reduce viscosity to achieve uniform perovskite thin films, but this approach could narrow the crystallization window and leave insufficient time for controlled crystal growth. Meanwhile, insufficient solute supply often results in interrupted material availability for grain growth, leading to the formation of excessive small crystal nuclei and thus poor thin-film quality. Here, we developed a strategy that use a bi-functional group additive to stabilize the δ-FAPbI3 intermediate phase, which delays the direct and rapid conversion of lead iodide into α-FAPbI3 during large-area perovskite film growth. Based on this strategy, the efficiencies of perovskite modules with aperture areas of 14.6, 70.5, and 285.6 cm2 developed in this work are 24.4% (certified steady-state efficiency: 24.4%), 23.1%, and 22.4%, respectively. The efficiency loss per order-of-magnitude increase in area was reduced from 2.0% to 1.3%, which is approaching the state of the art of traditional thin-film CdTe solar cells (0.8%). In addition, the large-area module (155 cm2) retained 86% of its initial efficiency after 1053 h of maximum power point (MPP) tracking.
Currently, the global 5G network, cloud computing, and data center industries are experiencing rapid development. The continuous growth of data center traffic has driven the vigorous progress in high-speed optical transceivers for optical interconnection within data centers. The electro-absorption modulated laser (EML), which is widely used in optical fiber communications, data centers, and high-speed data transmission systems, represents a high-performance photoelectric conversion device. Compared to traditional directly modulated lasers (DMLs), EMLs demonstrate lower frequency chirp and higher modulation bandwidth, enabling support for higher data rates and longer transmission distances. This article introduces the composition, working principles, manufacturing processes, and applications of EMLs. It reviews the progress on advanced indium phosphide (InP)-based EML devices from research institutions worldwide, while summarizing and comparing data transmission rates and key technical approaches across various studies.
The computational cost of TCAD simulations is becoming prohibitively high with the complexity of advanced process technologies, making simulation acceleration a critical research priority. While end-to-end surrogate models mapping process recipes to device structures and characteristics offer a promising alternative, their application is often limited by poor generalizability and explainability. In this work, we present MPNet, a modular deep learning surrogate modeling framework for process TCAD. MPNet comprises distinct surrogate models for individual process modules, which are assembled into an integrated framework. These modular models employ a novel UNet-attention feature evolution method to capture the complex evolutions of device geometry and doping profiles. Each module can be trained separately on its individual process, after which the modules are cascaded and jointly fine-tuned to minimize error accumulation throughout the cascade. The efficacy of the proposed MPNet framework is demonstrated through a MOSFET integrated process TCAD case study. Results show that MPNet achieves a computational speedup of over 103 times compared to conventional TCAD, while maintaining predictive fidelity exceeding 98%. Finally, to illustrated the application of the proposed framework, MPNet is coupled with a PSO algorithm, showcasing its utility for fast process optimization to meet specific process targets.
Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits(OEICs) based on a complementary metal-oxide-semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems.
In a recent article, Chen et al. [Electrochimica Acta, 2014, 130: 279] presented their fabrication and characterization results on a graphene/n-Si solar cell where the Au nanoparticles were inserted in graphene to increase its optical and electrical properties. The higher efficiency of the device was attributed to increased conductivity of graphene after doping with Au nanoparticles. However, the knowledge in the field of Schottky diode solar cells relates this to increased band bending at the junction. Also, to explain the instability behaviour, they concluded that the growth of silicon oxide on the Si surface or oxygen adsorption on the window layer resulted in the device performance increasing initially and decreasing in the end. However, this instability seems to be due to variation in series resistance reduced at the beginning because of slightly lowered Fermi level and increased at the end by the self-compensation by deep in-diffusion of Au nanoparticles into n-Si layer. We also propose that inserting a very thin p-type layer at the junction will enhance the carrier collection and performance of this device.
Artificial intelligence (AI) processes data-centric applications with minimal effort. However, it poses new challenges to system design in terms of computational speed and energy efficiency. The traditional von Neumann architecture cannot meet the requirements of heavily data-centric applications due to the separation of computation and storage. The emergence of computing in-memory (CIM) is significant in circumventing the von Neumann bottleneck. A commercialized memory architecture, static random-access memory (SRAM), is fast and robust, consumes less power, and is compatible with state-of-the-art technology. This study investigates the research progress of SRAM-based CIM technology in three levels: circuit, function, and application. It also outlines the problems, challenges, and prospects of SRAM-based CIM macros.
Based on the measured capacitance-voltage (C-V) curves and current-voltage (I-V) curves for the prepared differently-sized AlN/GaN heterostructure field-effect transistors (HFETs), the I-V characteristics of the AlN/GaN HFETs were simulated using the quasi-two-dimensional (quasi-2D) model. By analyzing the variation in the electron mobility for the two-dimensional electron gas (2DEG) with the channel electric field, it is found that the different polarization charge distribution generated by the different channel electric field distribution can result in different polarization Coulomb field (PCF) scattering. The 2DEG electron mobility difference is mostly caused by the PCF scattering which can reach up to 899.6 cm2/(V·s) (sample a), 1307.4 cm2/(V·s) (sample b), 1561.7 cm2/(V·s) (sample c) and 678.1 cm2/(V·s) (sample d), respectively. When the 2DEG sheet density is modulated by the drain-source bias, the electron mobility for samples a, b and c appear to peak with the variation of the 2DEG sheet density, but for sample d, no peak appears and the electron mobility rises with the increase in the 2DEG sheet density.
Chemical mechanical polishing (CMP) serves as an indispensable process for achieving global planarization in semiconductor manufacturing, especially as integrated circuit (IC) technology advances to sub-7 nm nodes, where atomic-level surface flatness becomes crucial. Silica abrasives, which account for over 90% of the abrasive market in advanced CMP processes, operate not through simple mechanical grinding but through a key "chemical-mechanical synergistic" mechanism: chemically softening the wafer surface, then mechanically removing the softened layer to expose a new surface, which is further softened and removed, repeating this cycle to produce a smooth wafer. Despite their prevalence, conventional silica abrasives still face challenges, including relatively low material removal rate (MRR), a tendency to agglomerate, leading to poor dispersion and surface defects, and limitations in achieving ultimate surface uniformity. Significant progress has been made to address these issues. Development has progressed from simple spherical particles to complex structural designs (such as mesoporous, hollow, and raspberry-shaped structures) to enhance slurry transport and mechanical action. Surface chemical modifications (e.g., using amino or polymer groups) can improve dispersion stability and reduce scratching. Furthermore, composites with other materials (e.g., ceria, polymers) and precise control of particle size distribution are key to enhancing performance. These innovative approaches have yielded significant performance gains. State-of-the-art slurries have demonstrated the ability to achieve surface roughness below 0.1 nm RMS. The development of silica abrasives is increasingly focused on sustainability and smart manufacturing. A prominent direction is the design of biodegradable abrasives that disintegrate after use, thereby simplifying post-chemical mechanical polishing (CMP) cleanup and minimizing environmental impact—an approach fully aligned with green manufacturing principles. This review systematically summarizes the progress of silica abrasives for CMP over the past 60 years. This summary provides theoretical insights and forward-looking strategies to overcome the current limitations of abrasive technology. We believe this review will be helpful in advancing the field of CMP abrasives towards next-generation semiconductor manufacturing.


