Memristors are now becoming a prominent candidate to serve as the building blocks of non-von Neumann in-memory computing architectures. By mapping analog numerical matrices into memristor crossbar arrays, efficient multiply accumulate operations can be performed in a massively parallel fashion using the physics mechanisms of Ohm’s law and Kirchhoff’s law. In this brief review, we present the recent progress in two niche applications: neural network accelerators and numerical computing units, mainly focusing on the advances in hardware demonstrations. The former one is regarded as soft computing since it can tolerant some degree of the device and array imperfections. The acceleration of multiple layer perceptrons, convolutional neural networks, generative adversarial networks, and long short-term memory neural networks are described. The latter one is hard computing because the solving of numerical problems requires high-precision devices. Several breakthroughs in memristive equation solvers with improved computation accuracies are highlighted. Besides, other nonvolatile devices with the capability of analog computing are also briefly introduced. Finally, we conclude the review with discussions on the challenges and opportunities for future research toward realizing memristive analog computing machines.

The ferroelectricity emerging in non-polar graphene/hexagonal boron nitride (hBN) heterostructures has drawn considerable attention because of its fascinating properties and promising high-frequency electrical polarization switching. Yet, the underlying mechanism is still under debate. Here in twisted double bilayer graphene (TDBLG) aligned with its neighboring hBN, we observed two types of hysteresis-delayed hysteresis in top gate induced by the anomalous screening, and advanced hysteresis in back gate caused by the anomalous gate-tunable capacitance. To investigate the role played by moiré potential in the anomalous hysteresis, we studied a moiréless graphene heterostructure. Unexpectedly, we observed exactly the same phenomena in this control device. Our findings suggest that the anomalous ferroelectricity in graphene/hBN heterostructures may originate from the dielectric material hBN, calling for further structural investigations on hBN. Further analysis indicates that those hysteresis can be asymmetric and scalable with applied external electric fields, distinct from conventional ferroelectric switching with well-defined coercive fields. The observation of gate-tunable capacitance provides more insights in the mysterious ferroelectricity in graphene/hBN heterostructures, and should enable new design of memory devices such as memcapacitor based on tunable capacitance.

The heterogeneous integration of III–V devices with Si-CMOS on a common Si platform has shown great promise in the new generations of electrical and optical systems for novel applications, such as HEMT or LED with integrated control circuitry. For heterogeneous integration, direct wafer bonding (DWB) techniques can overcome the materials and thermal mismatch issues by directly bonding dissimilar materials systems and device structures together. In addition, DWB can perform at wafer-level, which eases the requirements for integration alignment and increases the scalability for volume production. In this paper, a brief review of the different bonding technologies is discussed. After that, three main DWB techniques of single-, double- and multi-bonding are presented with the demonstrations of various heterogeneous integration applications. Meanwhile, the integration challenges, such as micro-defects, surface roughness and bonding yield are discussed in detail.

Currently, the global 5G network, cloud computing, and data center industries are experiencing rapid development. The continuous growth of data center traffic has driven the vigorous progress in high-speed optical transceivers for optical interconnection within data centers. The electro-absorption modulated laser (EML), which is widely used in optical fiber communications, data centers, and high-speed data transmission systems, represents a high-performance photoelectric conversion device. Compared to traditional directly modulated lasers (DMLs), EMLs demonstrate lower frequency chirp and higher modulation bandwidth, enabling support for higher data rates and longer transmission distances. This article introduces the composition, working principles, manufacturing processes, and applications of EMLs. It reviews the progress on advanced indium phosphide (InP)-based EML devices from research institutions worldwide, while summarizing and comparing data transmission rates and key technical approaches across various studies.

Beta gallium oxide (β-Ga₂O₃) has attracted significant attention for applications in power electronics due to its ultra-wide bandgap of ~ 4.8 eV and the large critical electric field of 8 MV/cm. These properties yield a high Baliga’s figures of merit (BFOM) of more than 3000. Though β-Ga₂O₃ possesses superior material properties, the lack of p-type doping is the main obstacle that hinders the development of β-Ga₂O₃-based power devices for commercial use. Constructing heterojunctions by employing other p-type materials has been proven to be a feasible solution to this issue. Nickel oxide (NiO) is the most promising candidate due to its wide band gap of 3.6–4.0 eV. So far, remarkable progress has been made in NiO/β-Ga₂O₃ heterojunction power devices. This review aims to summarize recent advances in the construction, characterization, and device performance of the NiO/β-Ga₂O₃ heterojunction power devices. The crystallinity, band structure, and carrier transport property of the sputtered NiO/β-Ga₂O₃ heterojunctions are discussed. Various device architectures, including the NiO/β-Ga₂O₃ heterojunction pn diodes (HJDs), junction barrier Schottky (JBS) diodes, and junction field effect transistors (JFET), as well as the edge terminations and super-junctions based on the NiO/β-Ga₂O₃ heterojunction, are described.

Artificial intelligence (AI) processes data-centric applications with minimal effort. However, it poses new challenges to system design in terms of computational speed and energy efficiency. The traditional von Neumann architecture cannot meet the requirements of heavily data-centric applications due to the separation of computation and storage. The emergence of computing in-memory (CIM) is significant in circumventing the von Neumann bottleneck. A commercialized memory architecture, static random-access memory (SRAM), is fast and robust, consumes less power, and is compatible with state-of-the-art technology. This study investigates the research progress of SRAM-based CIM technology in three levels: circuit, function, and application. It also outlines the problems, challenges, and prospects of SRAM-based CIM macros.

In DSP-based SerDes application, it is essential for AFE to implement a pre-ADC equalization to provide a better signal for ADC and DSP. To meet the various equalization requirements of different channel and transmitter configurations, this paper presents a 112 Gbps DSP-Based PAM4 SerDes receiver with a wide band equalization tuning AFE. The AFE is realized by implementing source degeneration transconductance, feedforward high-pass branch and inductive feedback peaking TIA. The AFE offers a flexible equalization gain tuning of up to 17.5 dB at Nyquist frequency without affecting the DC gain. With the proposed AFE, the receiver demonstrates eye opening after digital FIR equalization and achieves 6 × 10⁻⁹ BER with a 29.6 dB insertion loss channel.