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Volume 26, Issue 12, Dec 2005


  • Room Temperature Operation of Strain-Compensated 5.5μm Quantum Cascade Lasers

    Lu Xiuzhen, Liu Fengqi, Liu Junqi, Jin Peng, Wang Zhanguo

    Chin. J. Semicond.  2005, 26(12): 2267

    Abstract PDF

    Room temperature operation is an important criterion for high performance of quantum cascade lasers.A strain-compensated quantum cascade laser(λ≈5.5μm) with optimized waveguide structure lasing at room temperature is reported.Accurate control of layer thickness and strain-compensated material composition is demonstrated using X-ray diffraction.An output power of at least 45mW per facet is realized for a 20μm-wide and 2mm-long laser at room temperature.

  • One Method for Fast Gate Oxide TDDB Lifetime Prediction

    Zhao Yi, Wan Xinggong, Xu Xiangming

    Chin. J. Semicond.  2005, 26(12): 2271

    Abstract PDF

    A method for fast gate oxide TDDB lifetime prediction for process control monitors (PCM) is proposed.For normal TDDB lifetime prediction at operation voltage and temperature,we must get three lifetimes at relative low stress voltages and operation temperature.Then we use these three lifetimes to project the TDDB lifetime at operation voltage and temperature via the E-model.This requires a very long time for measurement.With our new method,it can be calculated quickly by projecting the TDDB lifetime at operation voltage and temperature with measurement data at relatively high stress voltages.Our test case indicates that this method is very effective.And the result with our new method is very close to that with the normal TDDB lifetime prediction method.But the measurement time is less than 50s for one sample,less than 1/100000 of that with the normal prediction method.With this new method, we can monitor gate oxide TDDB lifetime on-line.

  • Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings

    Sui Xiaohong, Liu Jinbin, Gu Ming, Pei Weihua, Chen Hongda

    Chin. J. Semicond.  2005, 26(12): 2275

    Abstract PDF

    A monolithic integrated CMOS preamplifier is presented for neural recording applications.Two AC-coupled capacitors are used to eliminate the large and random DC offsets existing in the electrode-electrolyte interface.Diode-connected nMOS transistors with a negative voltage between the gate and source are candidates for the large resistors necessary for the preamplifier.A novel analysis is given to determine the noise power spectral density.Simulation results show that the two-stage CMOS preamplifier in a closed-loop capacitive feedback configuration provides an AC in-band gain of 38.8dB,a DC gain of 0,and an input-referred noise of 277nVrms integrated from 0.1Hz to 1kHz.The preamplifier can eliminate the DC offset voltage and has low input-referred noise by novel circuit configuration and theoretical analysis.

  • Monolithic Integration of InGaP/AlGaAs/InGaAs Enhancement/Depletion-Mode PHEMTs

    Li Haiou, Zhang Haiying, Yin Junjian, Ye Tianchun

    Chin. J. Semicond.  2005, 26(12): 2281

    Abstract PDF

    The monolithic integration of enhancement- and depletion-mode (E/D-mode) InGaP/AlGaAs/InGaAs pseudomorphic high electron mobility transistors (PHEMTs) with a 1.0μm gate length is presented.Epilayers are grown on SI GaAs substrates using MBE.For this structure,a mobility of 5410cm2/(V·s) and a sheet density of 1.34e12cm-2 are achieved at room temperature.During the gate fabrication of E/D-mode PHEMTs,a novel two-step technology is applied.The devices with a gate dimension of 1μm×100μm exhibit good DC and RF performances.Threshold voltages of 0.2 and -0.4V,maximum drain current densities of 300 and 340mA/mm,and extrinsic transconductances of 350 and 300mS/mm for E- and D-mode PHEMTs are obtained,respectively.The reverse gate-drain breakdown voltage is -14V for both E- and D-mode.Current-gain cutoff frequencies of 103 and 124GHz and power-gain cutoff frequencies of 12.8 and 14.7GHz for E- and D-mode are reported,respectively.

  • A High Breakdown Voltage Thin SOI Device with a Vertically Linearly Graded Concentration Drift Region

    Lu Shengli, Sun Zhilin, Sun Weifeng, Shi Longxing

    Chin. J. Semicond.  2005, 26(12): 2286

    Abstract PDF

    As the thickness of an SOI layer varies,a minimum breakdown voltage is reached when the thickness is about 2μm.The vertical electric field of the SOI LDMOS with a drift region which is vertically linearly graded is constant.The vertically linearly graded concentration drift can be achieved by impurity implanting followed by thermal diffusion.In this way,the vertical breakdown voltage of SOI LDMOS with 2μm thickness SOI layer can be improved by 43%.The on-state resistance is lowered by 24% because of the higher impurity concentration of the SOI surface.

  • A New Process for Improving Performance of VCSELs

    Hao Yongqin, Zhong Jingchang, Xie Haorui, Jiang Xiaoguang, Zhao Yingjie, Wang Lijun

    Chin. J. Semicond.  2005, 26(12): 2290

    Abstract PDF

    A new process method is proposed to improve the light output power of GaAs vertical cavity surface-emitting lasers (VCSELs).The VCSELs with open-annulus-distributed holes have a light output power 1.34 times higher than those with ring trenches.The 14μm-aperture devices have a light output power higher than 10mW and have a maximum of 12.48mW at 29.6mA.In addition,open-annulus-distributed holes offer bridges for current injection, so the connecting Ti-Au metal between the ohmic contact and bonding pad does not have to cross the ring trench,and it therefore would not cause the connecting metal to be broken.These VCSELs also show high-temperature operation capabilities,and they have a maximum output power of 8mW even at an operation temperature of up to 60℃.


  • A New Process for Improving Performance of VCSELs

    Ren Bingyan, Gou Xianfang, Ma Lifen, Li Xudong, Xu Ying, Wang Wenjing

    Chin. J. Semicond.  2005, 26(12): 2294

    Abstract PDF

    Oxygen and carbon behaviors and minority-carrier lifetimes in multi-crystalline silicon (mc-Si) used for solar cells are investigated by FTIR and QSSPCD before and after annealing at 750~1150℃ in N2 and O2 ambient.For comparison,the annealing of CZ silicon with nearly the same oxygen and carbon concentrations is also carried out under the same conditions.The results reveal that the oxygen and carbon concentrations of mc-Si and CZ-Si have a lesser decrease,which means oxygen precipitates are not generated,and grain boundaries in mc-Si do not affect carbon behavior.Bulk lifetime of mc-Si increases in N2 and O2 ambient at 850,950,and 1150℃,and the lifetime of mc-Si wafers annealed in O2 are higher than those annealed in N2,which shows that a lot of impurities in mc-Si at high temperature annealing diffuse to grain boundaries,greatly reducing recombination centers.Interstitial Si atoms filling vacancies or recombination centers increases lifetime.

  • Growth and Characterisation of InAsSb Ternary Layers on (101) GaSb Substrates by LP-MOCVD

    Li Xiaoting, Wang Tao, Wang Jingwei, Wang Yiding, Yin Jingzhi, Sai Xiaofeng, Gao Hongkai, Zhang Zhiyong

    Chin. J. Semicond.  2005, 26(12): 2298

    Abstract PDF

    InAsSb alloys are grown on n-(100) GaSb (Te-doped) and GaAs substrates by the MOCVD using TMIn,TMSb,and AsH3 sources.The influence of growth parameters such as temperature,V/III ratio,and buffer layer on the surface morphology and solid composition is studied.The surface morphology is observed by AFM and SEM.The As and Sb concentrations in the solid are characterized by electron microprobe analysis.The crystalline quality of the InAsSb epilayer is characterized by double-crystal X-ray rocking curve diffraction.The electrical properties are observed by the (Van der Pauw) Hall technique at room temperature.An InAsSb epitaxy layer with mirror-like surface and lattice mismatch of 0.4% is obtained.

  • An Analytical Threshold Voltage Model for Fully Depleted SOI MOSFETs

    Li Ruizhen, Han Zhengsheng

    Chin. J. Semicond.  2005, 26(12): 2303

    Abstract PDF

    A new two-dimensional (2D) analytical model for the threshold-voltage of fully depleted SOI MOSFETs is derived.The 2D potential distribution functions in the active layer of the devices are obtained through solving the 2D Poisson’s equation.The minimum of the potential at the oxide-Si layer interface is used to monitor the threshold voltage of the SOI MOSFETs.This model is verified by its excellent agreement with MEDICI simulation using SOI MOSFETs with different gate lengths,gate oxide thicknesses,silicon film thicknesses,and channel doping concentrations.

  • A Broadband Long-Wavelength Superluminescent Diode Based on Graded Composition Bulk InGaAs

    Ding Ying, Wang Wei, Kan Qiang, Wang Baojun, Zhou Fan

    Chin. J. Semicond.  2005, 26(12): 2309

    Abstract PDF

    A novel unselective regrowth buried heterostructure long-wavelength superluminescent diode (SLD) with a graded composition bulk InGaAs active region is developed by metalorganic vapor phase epitaxy (MOVPE).At a 150mA injection current,the full width at half maximum of the emission spectrum of the SLD is about 72nm,ranging from 1602 to 1674nm.The emission spectrum is smooth and flat.The ripple of the spectrum is less than 0.3dB at any wavelength from 1550 to 1700nm.An output power of 4.3mW is obtained at a 200mA injection current under continuous-wave operation at room temperature.This device is suitable for the applications of light sources for gas detectors and L-band optical fiber communications.

  • Effect of DBR Geometry on Reflectivity and Spectral Linewidth of DBR Lasers

    Fang Dawei, Zhang Yi, Li Chenxia, Manzaneda C, Li Bo

    Chin. J. Semicond.  2005, 26(12): 2315

    Abstract PDF

    The linewidths of InGaAs-GaAs-AlGaAs DBR lasers with varied DBR dimensional parameters are measured and analyzed.These lasers were built with different DBR grating lengths and depths in order to explore the effect of the size of the DBR on its coupling coefficient and reflectivity,and hence on the linewidth of the laser diodes.The linewidths were measured by employing a self heterodyne linewidth measurement system.The experimental and calculated data for DBR reflectivity and spectral linewidth are given.The relationship between these data and the dimensions of the DBR is analyzed.Based on this analysis,the effect of the DBR geometry on the linewidth of the lasers is explored.The results give useful information related to the design and fabrication of such DBR lasers.

  • Design and Realization of CPW Circuits Using EC-ANN Models for CPW Discontinuities

    Hu jiang, Sun Lingling

    Chin. J. Semicond.  2005, 26(12): 2320

    Abstract PDF

    Novel accurate and efficient equivalent circuit trained artificial neural-network (EC-ANN) models,which inherit and improve upon EC model and EM-ANN models’ advantages,are developed for coplanar waveguide (CPW) discontinuities.Modeled discontinuities include:CPW step,interdigital capacitor,symmetric cross junction,and spiral inductor,for which validation tests are performed.These models allow for circuit design,simulation,and optimization within a CAD simulator.Design and realization of a coplanar lumped element band pass filter on GaAs using the developed CPW EC-ANN models are demonstrated.

  • Effects of Cu-Wire Surface Fluctuations on Early Failures

    Wang Hui, Zhu Jianjun, Wang Guohong, Bruynseraede C, Maex K

    Chin. J. Semicond.  2005, 26(12): 2330

    Abstract PDF

    Different chemical mechanical polishing (CMP) slurries are used to obtain single-damascene Cu-wires with different surface fluctuations as well as pre-existing surface-defects in wires with rougher surfaces.The presence of such pre-existing defects strongly increases the rate of early failures to almost 100%,reduces electromigration lifetime rapidly to the level of early failures,and changes the multimodal failure distribution into monomodal.The activation energy (0.74±0.02eV) for the failure mechanism associated with these pre-existing defects confirms a dominant surface diffusion.It shows how a weakest link approximation analysis can be applied to a single wire by dividing the wire into relevant segments and assigning different failure mechanisms to the various segments.The analysis confirms that,although surface-defects are not the fastest early failure mechanism,the ten times higher surface-defect-density in the rougher wires is responsible for the observed high early-failure rate and unreliable performance.

  • An Incremental Algorithm for Non-Slicing Floorplan Based on Corner Block List Representation

    Yang Liu, Ma Yuchun, Hong Xianlong, Dong Sheqin, Zhou Qiang

    Chin. J. Semicond.  2005, 26(12): 2335

    Abstract PDF

    We present a novel incremental algorithm for non-slicing floorplans based on the corner block list representation.The horizontal and vertical adjacency graphs are derived from the packing of the initial floorplanning results.Based on the critical path and the accumulated slack distances we define,we choose the best position for insertion and do a series of operations incrementally,such as deleting modules,adding modules,and resizing modules quickly.This incremental floorplanning algorithm has a very high speed less than 1μm,which is one of the most important measures in this research.The algorithm preserves the original good performances on area and wire length.It can also supply other tools with good physical estimates for area,wire length,and other performance guidelines.

  • A Broyden Method for Self-Consistent Solution of Schrdinger and Poisson Equations

    Sun Lin, Yang Wenwei, Xiang Cailan, Yu Zhiping, Tian Lilin

    Chin. J. Semicond.  2005, 26(12): 2344

    Abstract PDF

    A Broyden method,which has been used in the device simulation domain,is described and used to self-consistently solve the electron density and electric potential of a 1D semiconductor quantum line.Results are compared to those obtained by the SOR method (Newton method).The convergence rates of these two methods are also compared.The Broyden method yields an accurate results using fewer iteration steps.Thus the Broyden method can greatly accelerate the process of solving Schrodinger and Poisson nonlinear equation systems.

  • Influence of Interaction Between Phonons on Properties of Magnetopolarons in Semiconductor Quantum Dots

    Zhang Peng, Xiao Jinglin

    Chin. J. Semicond.  2005, 26(12): 2350

    Abstract PDF

    The properties of the magnetopolaron in a semiconductor quantum dot are studied.The ground state energy of the magnetopolaron is derived by using a linear combination operator and the perturbation method.Considering the interaction between phonons of different wave vectors in the recoil process,the influence on the ground state energy of the magnetopolaron is discussed.Numerical calculations show that the ground state energy of magnetopolarons will increase strongly with a decrease in the effective confinement length of the quantum dots and will decrease with increasing magnetic field.For a weak magnetic field,the influence of the interaction between phonons on the ground state energy of the magnetopolarons can not be ignored.

  • Influences of Differently Shaped Quantum Dots on Elastic Strain Field Distributions

    Liu Yumin, Yu Zhongyuan, Yang Hongbo, Huang Yongzhen

    Chin. J. Semicond.  2005, 26(12): 2355

    Abstract PDF

    Adopting the two-dimensional axis-symmetrical model,a systematic analysis of the elastic strain distribution of geometrically differently shaped quantum dots is conducted using the finite element method.The detailed results for the elastic strain distribution of lens,cylinder,pyramid,and cone-shaped quantum dots are given.These show that the shape of the quantum dot has obvious influences on both the normal and shear strain distributions,while not affecting the hydrostatic strain distributions.The hydrostatic strain distribution is almost the same in both the center axis and circumjacent path.The shear strain distributions are focused on the circumjacent path,and the extremas are located in the inflexion of the circumjacent path,while the other parts of the quantum dot,including the path along the center axis,have no shear strain.

  • ZnO Thin Film Growth by Metal Organic Chemical Vapor Deposition and Its Back Contact Application in Solar Cells

    Chen Xinliang, Xu Buheng, Xue Junming, Zhao Ying, Zhang Xiaodan, Geng Xinhua

    Chin. J. Semicond.  2005, 26(12): 2363

    Abstract PDF

    Microstructure and photo-electronic properties of ZnO films grown by metal organic chemical vapor deposition at different B2H6 flow rates are investigated.XRD spectra and SEM photos indicate that B-doping plays a great role on the microstructure of ZnO films.By optimizing conditions with the B2H6 flow rate as the dopant gas set at 17sccm,a low sheet resistance (38Ω/□), and high transparency (>85%) in the range of visible and infrared light,and a mobility of 17.8cm2/(V·s) are obtained for a 700nm thick ZnO film deposited on a 20cm×20cm substrate at a low temperature of 170℃.After the ZnO film is applied as the back contact in a solar cell,Jsc can be effectively improved by nearly 3mA,and a 9.09% efficiency is obtained in a large-area (20cm×20cm) a-Si integrated solar cell.

  • Influence of Substrate Temperature on Preparation of c-BN Thin Films with Wide Energy Gap

    Chen Hao, Deng Jinxiang, Chen Guanghua, Liu Junkai, Tian Ling

    Chin. J. Semicond.  2005, 26(12): 2369

    Abstract PDF

    With a two-stage method,cubic boron nitride (c-BN) thin films are deposited on p-Si (100) by radio frequency sputter.The thin films are characterized by Fourier transform infrared spectroscopy.With all other conditions being held constant,the influence of the substrate temperature on the nucleation of c-BN is investigated.When the substrate temperature is below 400℃,the cubic phase can not be formed.Once the substrate temperature is above 400℃,the cubic phase starts to form.When the substrate temperature reaches 500℃,there is only the cubic phase (100%) in the thin films.It is evident that the relative content of c-BN in the films increases with the increase of the substrate temperature in the nucleation stage.We also investigate the effect of the substrate temperature in the nucleation stage on the FTIR absorption peak position and compressive stress in the thin films.The results show that different substrate temperatures in the nucleation stage result in different compressive stress in the thin films and that the compressive stress in the thin films decreases with the increase of the substrate temperature in the nucleation stage.The mechanism of c-BN nucleation is also discussed.

  • Electric Dipole Moment of Graded Spherical Semiconductor Quantum Dots Embedded in Glass

    Tian Qiang, Liu Huimin, Fan Jieping, Yang Yonggang

    Chin. J. Semicond.  2005, 26(12): 2374

    Abstract PDF

    Semiconductor quantum dots embedded in glass,prepared with the method of co-melting,are graded spherical.Considering the gradation profile as a radial exponential function,the electric potential equation is solved in spherical coordinates.The electric dipole moment of the graded spherical quantum dot in glass is obtained.The results show that the dipole moment is proportional to the volume of the quantum dot.The relation of the dipole moment to the permittivity is presented.

  • Growth of GaN on γ-Al2O3/Si(001) Composite Substrates

    Liu Zhe, Wang Junxi, Li Jinmin, Liu Hongxin, Wang Qiyuan, Wang Jun, Zhang Nanhong, Xiao Hongling, Wang Xiaoliang, Zeng Yiping

    Chin. J. Semicond.  2005, 26(12): 2378

    Abstract PDF

    Crack-free GaN epilayers on Si(001) substrates are obtained by molecular beam epitaxy with novel γ-Al2O3 materials as intermediate layers.GaN growth along c-director is realized and a hexagonal single crystalline GaN is achieved.Experimental results indicate that pretreatment with Al and a high temperature AlN layer can improve the quality of GaN and a low temperature AlN layer can improve the surface roughness of GaN.This provides an effective method to overcome the difficulties of GaN growth on Si(001) substrates.

  • Growth of (111) Textured 3C-SiC on Si (111) by Low Energy Ion Beam Deposition

    Yang Fei, Chen Nuofu, Zhang Xingwang, Yang Shaoyan, Liu Zhikai, Chai Chunlin, Hou Zhezhe, Ma Hui, Yin Zhigang

    Chin. J. Semicond.  2005, 26(12): 2385

    Abstract PDF

    The (111) textured cubic silicon carbide (3C-SiC) thin films are deposited on (111) Si substrates using the mass-selected ion beam deposition technique at various substrate temperatures.These films are characterized by X-ray photoelectron spectroscopy,Auger electron spectroscopy,and X-ray diffraction.The carbon ions are reacted with the Si substrates and the amorphous Si-C layers are obtained at room temperature and 400℃,respectively,while the (111) textured 3C-SiC films are formed at 800℃.In addition,the mechanism of SiC formation is also discussed based on the diffusion process.The SiC thin films are much thicker than those predicted by TRIM, due to the channel effect and the enhanced diffusion caused by implanted ions with certain energies at high substrate temperatures.

  • Magnetic and Structural Properties of Room-Temperature Ferromagnetic Al2O3∶Mn

    Zhang Fuqiang, Chen Nuofu, Yang Ruixia, Wei Huaipeng, Liu Xianglin, Liu Zhikai, Yang Shaoyan, Chai Chunlin

    Chin. J. Semicond.  2005, 26(12): 2390

    Abstract PDF

    Room-temperature ferromagnetic Al2O3∶Mn samples are prepared with the multi-energy ion implantation method by an ion beam implantation system.A new diffraction peak is observed near the Al2O3,which corresponds to a new unknown phase or to the solid solution phase of Al2O3∶Mn.Magnetic hysteresis-loops of all Al2O3∶Mn samples are obtained at room temperature.This indicates that all samples are ferromagnetic at room-temperature.

  • Effect of an AlN Spacer Layer on AlGaN/GaN HEMTs

    Zhang Jincheng, Wang Chong, Yang Yan, Zhang, Zhang Jinfeng, Feng Qian, Li Peixian

    Chin. J. Semicond.  2005, 26(12): 2396

    Abstract PDF

    AlGaN/GaN and AlGaN/AlN/GaN heterostructure two-dimensional electron gas materials are grown on sapphire substrates by low-pressure MOCVD technique.AlGaN/GaN HEMTs and AlGaN/AlN/GaN HEMTs are fabricated by the same device processes.The effects of an AlN spacer layer on the device performance of AlGaN/GaN HEMTs are studied by comparing the DC characteristics of these two different devices.

  • A CMOS Wideband Variable Gain Amplifier

    Wang Ziqiang, Chi Baoyong, Wang Zhihua

    Chin. J. Semicond.  2005, 26(12): 2401

    Abstract PDF

    A CMOS wideband low power variable gain amplifier (VGA) is presented.The frequency response of a common source amplifier that makes use of a source degeneration resistor is analyzed.The bandwidth of the amplifier is enlarged without extra power consumption by adding compensation capacitors to change the location of the poles and zeros.The voltage peaking that appeared at low gain is solved and the linearity is improved by using a gm-boost circuit.The VGA is designed using TSMC 0.25μm CMOS technology.Simulation results show that the VGA core consumes 3.15mW at 3.3V supply voltage and has a gain range from 0 to 40dB.Its 3dB bandwidth is larger than 340MHz and OIP3 is higher than 3.5dBm with a 5pF load.

  • Measurements of Optical Characterization for CMOS

    Song Min, Zheng Yaru, Lu Yongjun, Qu Yanling, Song Limin

    Chin. J. Semicond.  2005, 26(12): 2407

    Abstract PDF

    A new method is introduced for measuring the modulation transfer function (MTF) of CMOS imaging sensors.Experimental arrangements are constructed for the measurement of the MTF and quantum efficiency of CMOS.The MTF and quantum efficiency of a 1024×1024 CMOS imaging sensor are measured,and the results are satisfactory.

  • Characteristics of I sub,max Stress in 90nm-Technology nMOSFETs

    Chen Haifeng, Ma Xiaohua, Hao Yue, Cao Yanrong, Huang Jianfang, Wang Wenbo, Li Kang

    Chin. J. Semicond.  2005, 26(12): 2411

    Abstract PDF

    The characteristics of hot carriers in 90nm-technology LDD (lightly doped drain) nMOSFETs are investigated under Isub,max stress.By analyzing the variation of the GIDL (gate-induced drain leakage) current before and after applying successive stresses to the LDD nMOSFET,it is found that when the nMOSFET’s gate thickness and channel length approach 1nm and 100nm respectively,the Isub,max stress is neither a electron-injection stress nor a both electron- and hole-injection stress,but a hole-injection stress.Furthermore,the conclusion is supported by the experiment of hole-injection stress and negative Isub,max stress.

  • Fabrication and Simulation of NDRHBT

    Li Jianheng, Zhang Shilin, Guo Weilian, Qi Haitao, Liang Huilai, Mao Luhong

    Chin. J. Semicond.  2005, 26(12): 2416

    Abstract PDF

    A thin base (8nm) InGaP/GaAs dual heterojunction material is grown by MBE and a heterojunction bipolar transistor (HBT) with negative differential resistance (NDR) is fabricated.The NDR is observed at constant voltage and current.A physical analysis of this device is presented.The physical I_C-V_CE formulas are derived and the relation between the NDR and the structure and parameters of this device is discussed.The circuit net list model is compiled by PSPICE including the I_C-V_CE formulas and the simulated result is close to the measured outcome.

  • Pressure Effect on Electronic Mobility in Quasi-Two-Dimensional AlxGa1-xAs/GaAs Heterojunction Systems

    Bai Xianping, Ban Shiliang

    Chin. J. Semicond.  2005, 26(12): 2422

    Abstract PDF

    A variational method and a memory function approach are adopted to investigate electronic mobility and pressure effect in quasi-two-dimensional heterojunction systems by considering optical phonon modes (including bulk longitudinal optical(LO) phonons and interface optical(IO) phonons) and a realistic heterojunction potential model, which includes the influences of finite potential barrier and energy band bending.Meanwhile,the tunnelling of electrons into the barrier is taken into account.A numerical calculation is performed for the AlxGa1-xAs/GaAs heterojunctions.The results show that electron mobility obviously decreases as the temperature and pressure incrense;the contribution to electron mobility from IO phonon scattering under pressure becomes more obvious than that from LO phonon scattering.Under pressure,the effect of IO phonon scattering cannot be neglected in further works.

  • Degradation in Flash Memory Under Low Electric Field Stress

    Zheng Xuefeng, Hao Yue, Liu Hongxia, Ma Xiaohua

    Chin. J. Semicond.  2005, 26(12): 2428

    Abstract PDF

    Based on the negative gate source-side erased flash memory cell,three conduction mechanisms causing stress-induced leakage current are studied.The voltage shifts which cause steady-state and transient currents are measured by new experimental methods.The reliability of flash memory cells is investigated using the capacitance coupling effect model.The results show that the cell reliability under a low electric field stress is mainly affected by the carriers charging and discharging inside the oxide.

  • Design of a Chaotic Random Number Generator

    Wang Yunfeng, Shen Haibin, Yan Xiaolang

    Chin. J. Semicond.  2005, 26(12): 2433

    Abstract PDF

    A chaotic random number generator (CRNG) is developed.It is realized by analog circuit,but could be fabricated in a standard digital CMOS process.Thus the CRNG could be used as the intelligent property for the design of an SOC.All capacitors are realized using MOS devices operated in the depletion region,and MOSCAPS are linearized by a series compensation technique.The CRNG has been tapped out in TSMC with a conventional 0.25μm digital n-well CMOS process.Testing of the CRNG chip has also been completed.The test results show that the numbers generated by the CRNG are in fact random.

  • Influence of Contact Effects on Properties of a Small Thermoelectric Power Generator

    Li Maode, Qu Jian, Li Yudong, Li Weijiang

    Chin. J. Semicond.  2005, 26(12): 2440

    Abstract PDF

    The influence of the thermal contact resistance and electric contact resistance of a small thermoelectrical power generator (TEG) is analyzed.Results show that the thermal contact resistance and electrical contact resistance have a noticeable influence on the thermoelectric power generator when the thermal couple length is less than 2mm.The power reaches 4mW/mm2,and the efficiency reaches 3.5% when Tc=283K,Th=383K,Z=0.0024K-1,lc=2mm,r=0.2,and n=0.1.The maximum thermoelectric efficiency is 4.2% without thermal contact resistance or electrical contact resistance.Furthermore,the power output and efficiency increase strongly when the thermal couple length is less than 2mm,but the power output tends to decrease to a constant and the efficiency tends to increase to a constant when the thermal couple length is more than 5mm.It is shown that the influence of thermal contact resistance and electrical contact resistance of the thermoelectric power generator cannot be neglected.

  • Designs and Analysis of Series Capacitive RF-MEMS Switches

    Sun Jianhai, Cui Dafu

    Chin. J. Semicond.  2005, 26(12): 2445

    Abstract PDF

    This paper reports a capacitive switch with a high capacitance ratio.In contrast to conventional capacitive switches,the switch designed here has a metal film covering the dielectric on the signal line to ensure intimate contact with the dielectric film in the down state.The metal film can constitute two series capacitances versus the bridge and the signal line,so the up-capacitance can be lowered significantly.This allows further optimization of the down/up capacitance,with values more than 1000 over conventional designs under the same conditions.The switch designed here shows better isolation performance than conventional capacitive switches,with an isolation of 42dB at 8GHz.

  • Design of SCH Structure for High-Power Broad Area 808nm GaAsP/AlGaAs Quantum-Well Lasers

    Wang Jun, Ma Xiaoyu, Lin Tao, Zheng Kai, Feng Xiaoming

    Chin. J. Semicond.  2005, 26(12): 2449

    Abstract PDF

    Separate-confinement heterostructures(SCH) of 100μm-wide-stripe GaAsP/AlGaAs quantum-well lasers emitting at a wavelength of 808nm are analyzed and designed theoretically.Choosing three cases of Al-content of the waveguide layer and the cladding layer,we calculate and analyze the dependences of the optical confinement factor,maximal output power,vertical divergence angle,and threshold current density on the thickness of the waveguide layer.Calculated results show that when the Al-content of the waveguide and cladding layers are 0.4 and 0.5 respectively,a maximal output power of 11.2W,vertical divergence angle of 19°,and threshold current density of 266A/cm2 can be achieved by adapting narrow waveguide layers;further,a maximal output power of 9.4W,vertical divergence angle of 32°,and threshold current density of 239A/cm2 can be obtained by adapting broad waveguide layers.

  • A GaAs PHEMT Laser/Modulator Driver for 24 Gb/s Optical Transmitters

    Li Wenyuan, Wang Zhigong

    Chin. J. Semicond.  2005, 26(12): 2455

    Abstract PDF

    An integrated laser and optical modulator driver for ultra-high speed optic-fiber communication systems is designed and fabricated in a 0.2μm gate length AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) process.The circuit consists of two stages of differential amplifiers with source follower pairs,a capacitive coupled current amplifier,and an output circuit.The driver IC occupies a die area of 1.0mm×0.9mm.Under a single supply of +5V,the power consumption is about 1.5W.Open eye diagrams are measured at a bit rate of up to 24Gb/s with a 2.4Vp-p voltage swing.It can be used in synchronous digital hierarchy transmission systems of optic-fiber communication.


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