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Volume 26, Issue 3, Mar 2005


  • Space Charges Effect of Static Induction Transistor

    Chen Jinhuo, Liu Su, Wang Yongshun, Li Siyuan, and Zhang Fujia

    Chin. J. Semicond.  2005, 26(3): 423

    Abstract PDF

    The space charge effect (SCE) of static induction transistor (SIT) that occurs in high current region is systematically studied.The I-V equations are deduced and well agree with experimental results.Two kinds of barriers are presented in SIT,corresponding to channel voltage barrier control (CVBC) mechanism and space charge limited control (SCLC) mechanism respectively.With the increase of drain voltage,the gradual transferring of operational mechanism from CVBC to SCLC is demonstrated.It points out that CVBC mechanism and its contest relationship with space charge barrier makes the SIT distinctly differentiated from JFET and triode devices,etc.The contest relationship of the two potential barriers also results in three different working regions,which are distinctly marked and analyzed.Furthermore,the extreme importance of grid voltage on SCE is illustrated.

  • Analytical Modeling of Threshold Voltage for Double-Gate MOSFET Fully Comprising Quantum Mechanical Effects

    Zhang Dawei, Tian Lilin,and Yu Zhiping

    Chin. J. Semicond.  2005, 26(3): 429

    Abstract PDF

    The analytical solutions to 1D Schrodinger equation (in depth direction) in douBle-gate (DG) MOSFETs are derived to calculate electron density and threshold voltage.The non-uniform potential in the channel is concerned with an arbitrary depth so that the analytical solutions agree well with numerical ones.Then,an implicit expression for electron density and a closed form of threshold voltage are presented fully comprising quantum mechanical (QM) effects.This model predicts an increased electron density with an increasing channel depth in subthreshold region or mild inversion region.However,it becomes independent on channel depth in strong inversion region,which is in accordance with numerical analysis.It is also concluded that the QM model,which barely considers a box-like potential in the channel,slightly overpredicts threshold voltage and underestimates electron density,and the error increases with an increasing channel depth or a decreasing gateoxide thickness.

  • On-State Breakdown Model for High Voltage RESURF LDMOS

    Fang Jian, Yi Kun, Li Zhaoji, and Zhang Bo(436)

    Chin. J. Semicond.  2005, 26(3): 436

    Abstract PDF

    An analytical breakdown model under on-state condition for high voltage RESURF LDMOS is proposed.The model considers the drift velocity saturation of carriers and influence of parasitic bipolar transistor.As a result,electric field profile of n-drift in LDMOS at on-state is obtained.Based on this model,the electric SOA of LDMOS can be determined.The analytical results partially fit to our numerical (by MEDICI) and experiment results.This model is an aid to understand the device physics during on-state accurately and it also directs high voltage LDMOS design.

  • 1.55μm Laser Diode Monolithically Integrated with Spot-Size Converter Using Conventional Process

    Hou Lianping, Wang Wei, and Zhu Hongliang

    Chin. J. Semicond.  2005, 26(3): 443

    Abstract PDF

    A novel 1.55μm laser diode with spot-size converter is designed and fabricated using conventional photolithography and chemical wet etching process.For the laser diode,a ridge double-core structure is employed.For the spot-size converter,a buried ridge double-core structure is incorporated.The laterally tapered active core is designed and optically combined with the thin and wide passive core to control the size of mode.The laser diode threshold current is measured to be 40mA together with high slop efficiency of 0.35W/A.The beam divergence angles in the horizontal and vertical directions are as small as 14.89°×18.18°,respectively,resulting in low-coupling losses with a cleaved optical fiber (3dB loss).

  • A 4.8GHz CMOS Fully Integrated LC Balanced Oscillator with Symmetrical Noise Filter Technique and Large Tuning Range

    Yang Fenglin, Zhang Zhaofeng, Li Baoqi, and Min Hao

    Chin. J. Semicond.  2005, 26(3): 448

    Abstract PDF

    This paper presents a fully integrated 4.8GHz VCO with an invention——symmetrical noise filter technique.This VCO,with relatively low phase noise and large tuning range of 716MHz,is fabricated with the 0.25μm SMIC CMOS process.The oscillator consumes 6mA from 2.5V supply.Another conventional VCO is also designed and simulated without symmetrical noise filter on the same process,which also consumes 6mA current and is with the same tuning.Simulation result describes that the first VCO’ phase noise is 6dBc/Hz better than the latter’s at the same offset frequency from 4.8GHz.Measured phase noise at 1MHz away from the carrier in this 4.8GHz VCO with symmetrical noise filter is -123.66dBc/Hz.This design is suitable for the usage in a phase-locked loop and other consumer electronics.It is amenable for future technologies and allows easy porting to different CMOS manufacturing process.

  • A New Method to Retrieve Proximity Effect Parameters in Electron-Beam Lithography

    Kang Xiaohui, Li Zhigang, Liu Ming, Xie Changqing, and Chen Baoqin

    Chin. J. Semicond.  2005, 26(3): 455

    Abstract PDF

    A new method for determining proximity parameters α,β,and η in electron-beam lithography is introduced on the assumption that the point exposure spread function is composed of two Gaussians.A single line is used as test pattern to determine proximity effect parameters and the normalization approach is adopted in experimental data transaction in order to eliminate the need of measuring exposure clearing dose of the resist.Furthermore,the parameters acquired by this method are successfully used for proximity effect correction in electron-beam lithography on the same experimental conditions.

  • Peculiar Photoconduction in Semi-Insulating GaAs Photoconductive Switch Triggered by 1064nm Laser Pulse

    Shi Wei, Dai Huiying, and Zhang Xianbin

    Chin. J. Semicond.  2005, 26(3): 460

    Abstract PDF

    The peculiar photoconduction in semi-insulating GaAs photoconductive switch being triggered by 1064nm laser pulse is reported.The gap between two electrodes of the switch is 4mm.When it is triggered by laser pulse with energy of 0.8mJ and the pulse width of 5ns,and operated at biased electric field of 2.0 and 6.0kV/cm,both linear and nonlinear modes of the switch are observed respectively.Whereas the biased electric field adds to 9.5kV/cm,and the triggered laser is in range of 0.5~1.0mJ,the peculiar performed characteristic is observed:the switch gives a linear waveform firstly,and then after a delaytime of about 20~250ns,it outputs a nonlinear waveform again.The physical mechanism of this specific phenomenon is associated with the anti-sitedefects of semi-insulating GaAs and two-step-single-photon absorption.The delay time between linear waveform and nonlinear waveform is calculated,and the result matches the experiments.

  • Full Band Monte Carlo Simulation of Electron Transport in Ge with Anisotropic Scattering Process

    Chen, Yong, and, Ravaioli, Umberto

    Chin. J. Semicond.  2005, 26(3): 465

    Abstract PDF

    The electron transport properties in Ge are calculated by full band Monte Carlo technique with anisotropic scattering consideration.The calculation procedures are as follows:the full band structure is calculated by nonlocal empirical pseudopotential approach;the relative value of density of state (DOS) is computed by counting the number of states located in a certain region of the energy;the phonon dispersion curve is obtained from an adiabatic bondcharge model;the electron-phonon scattering rates are approximated by the nonparabolic model derived from Fermi’s golden rule at low energy region and scaled by DOS at higher energy region;the energy and momentum conservations are employed for choosing the final state after scattering.The validity of this Monte Carlo simulator and the physical models that are used is fully confirmed by comparing the program output to experimental results listed in references.As this Monte Carlo model can accurately reproduce the velocity and energy characteristics of electrons in Ge and the DOS scaled scattering rate can significantly reduce the computational cost for scattering rates,this approach is suitable for device simulation.

  • Lattice-Matched InP-Based HEMTs with fT of 120GHz

    Chen Liqiang, Zhang Haiying, Yin Junjian, Qian He, and Niu Jiebin

    Chin. J. Semicond.  2005, 26(3): 472

    Abstract PDF

    Lattice-matched InP-based InAlAs/InGaAs HEMTs with 120GHz cutoff frequency are reported.These devices demonstrate excellent DC characteristics:the extrinsic transconductance of 600mS/mm,the threshold voltage of -1.2V,and the maximum current density of 500mA/mm.

  • AIN Monolithic Microchannel Cooled Heatsink for High Power Laser Diode Array

    Ma Jiehui, Fang Gaozhan, Lan Yongsheng and, Ma Xiaoyu

    Chin. J. Semicond.  2005, 26(3): 476

    Abstract PDF

    A novel AIN monolithic microchannel cooled heatsink for high power laser diode array is introduced.The high power stack laser diode array with an AIN monolithic microchannel heatsink is fabricated and tested.The thermal impedance of a 10 stack laser diode array is 0.121℃/W.The pitch between two adjacent bars is 1.17mm.The power level of 611W is achieved under the 20% duty factor condition at an emission wavelength around 808nm.

  • Noise Analysis of Analog Correlator

    Tu Chunjiang, Liu Bo’an,and Chen Hongyi

    Chin. J. Semicond.  2005, 26(3): 480

    Abstract PDF

    A noise model for the analog correlator used in the ultra wideband receivers is proposed due to lack of simulation capability on noise performance of the correlator in current EDA tools.The analog correlator circuit is divided into several parts to calculate the equivalent noise sources respectively.The ideal impulse generators,instead of the noise sources,are then applied to obtain the time varying transfer functions.Fourier transforms are carried out to explore the relationship between the noise input and output in frequency domain for each part.Then the symmetrical noise sources are grouped together and the periodicity of the circuit is utilized to further simplify the model.This model can be used to evaluate noise performance of the correlator.

  • A Systematical Approach for Noise in CMOS LNA

    Feng, Dong, and, Shi, Bingxue

    Chin. J. Semicond.  2005, 26(3): 487

    Abstract PDF

    A systematic approach is used to analyze the noise in CMOS low noise amplifier(LNA),including channel noise and induced gate noise in MOS devices.A new analytical formula for noise figure is proposed.Based on this formula,the impacts of distributed gate resistance and intrinsic channel resistance on noise performance are discussed.Two kinds of noise optimization approaches are performed and applied to the design of a 5.2GHz CMOS LNA.

  • MOCVD生长Mg掺杂GaN的退火研究

    冉军学, 王晓亮, 胡国新, 王军喜, 李建平, 曾一平, 李晋闽

    Chin. J. Semicond.  2005, 26(3): 494

    Abstract PDF


  • 退火温度对ZnO薄膜结构和发光性能的影响

    温战华, 王立, 方文卿, 蒲勇, 罗小平, 郑畅达, 戴江南, 江风益

    Chin. J. Semicond.  2005, 26(3): 498

    Abstract PDF

    采用常压金属有机物化学气相淀积法在(0001)Al2O3衬底上生长出高质量ZnO单晶膜,在空气中进行了710~860℃不同温度的退火处理.用X射线双晶衍射、光致发光法研究了退火温度对ZnO薄膜的结构、发光性能的影响.ZnO(002)面X射线双晶ω扫描曲线的半高宽(FWHM) 随退火温度的升高变小,770℃后基本保持不变,ZnO(102)面双晶ω扫描曲线的FWHM一直变小.770℃退火后ZnO样品X射线ω-2θ扫描曲线中出现ZnO2(200)衍射峰.同时,光致发光测试表明,随着退火温度升高,带边发光强度减弱,与深能级有关的绿带发光出现并逐渐增强.通过ICP刻蚀,去除退火后样品的表面层,ω-2θ扫描曲线中ZnO2(200)衍射峰和PL谱中绿带发光均消失,表明ZnO2相和深能级缺陷在样品表面.

  • 常压MOCVD生长的ZnO薄膜的电学性能

    周鹏, 王立, 方文卿, 蒲勇, 戴江南, 江风益

    Chin. J. Semicond.  2005, 26(3): 502

    Abstract PDF

    利用常压MOCVD法在蓝宝石(0001)衬底上沉积了非故意掺杂ZnO单晶薄膜.用Van der Pauw法测量了其从15K到室温的载流子浓度和霍耳迁移率,并用双层结构单施主模型对载流子浓度和迁移率进行了拟合分析.研究表明:ZnO薄膜浅施主能级为20.4meV,温度较低时,以电离杂质散射为主,温度较高时,以极性光学波散射为主.

  • p型GaN的掺杂研究

    金瑞琴, 朱建军, 赵德刚, 刘建平, 张纪才, 杨辉

    Chin. J. Semicond.  2005, 26(3): 508

    Abstract PDF


  • 液相外延HgCdTe薄膜组分均匀性的研究

    马庆华, 陈建才, 吴军, 孔金丞, 杨宇, 姬荣斌

    Chin. J. Semicond.  2005, 26(3): 513

    Abstract PDF


  • 勾形磁场下直径300mm CZ Si熔体中氧浓度分布的数值模拟

    宇慧平, 隋允康, 张峰翊, 常新安

    Chin. J. Semicond.  2005, 26(3): 517

    Abstract PDF

    采用低雷诺数K-ε紊流模型,考虑自然对流、晶体旋转和坩埚旋转等因素,对晶体直径为300mm,磁场强度变化范围在0~0.12T条件下,熔体硅内流场及氧的浓度分布、磁场分布等作了数值模拟.计算中采用有限体积法,运用SIMPLE(semiimplicit method for pressure linked equations)算法耦合压力和速度场,动量方程、能量方程中对流项的离散采用QUICK(quadratic upwind interpolation of convective kinematics)格式,紊动能和耗散项方程中对流项的离散采用迎风格式.数值模拟结果表明,在勾形磁场作用下,熔体硅内的流场、氧的浓度分布与无磁场作用相比有较大不同,随着磁场强度的增加,生长界面处氧的浓度降低,并且磁场确实能有效地抑制熔体内的紊流,有利于晶体生长.

  • 电化学腐蚀法制备的SiO2包裹纳米硅颗粒结构的电致发光特性

    严勇健, 吴雪梅, 诸葛兰剑

    Chin. J. Semicond.  2005, 26(3): 524

    Abstract PDF


  • 基于MBE的fmax为157GHz的SiGe HBT器件

    刘道广, 郝跃, 徐世六, 李开成, 刘玉奎, 何开全, 刘嵘侃, 张静, 刘伦才, 徐婉静, 李荣强, 陈光炳, 徐学良

    Chin. J. Semicond.  2005, 26(3): 528

    Abstract PDF

    在模拟集成电路的应用中,不仅注重器件fT,而且注重晶体管最高振荡频率(fmax).文中以MBE生长的SiGe材料为基础,进行了提高SiGe HBT器件fmax的研究,研制出了fmax=157GHz的SiGe HBT器件

  • 0.1μm槽栅CMOS器件及相关特性

    张晓菊, 马晓华, 任红霞, 郝跃, 孙宝刚

    Chin. J. Semicond.  2005, 26(3): 532

    Abstract PDF


  • SOI硅膜厚度对RESURF LDMOS参数的影响

    孙智林, 孙伟锋, 吴建辉

    Chin. J. Semicond.  2005, 26(3): 536

    Abstract PDF

    对SOI LDMOS进行了建模,得到了器件各主要参数的最优值与SOI硅膜厚度的关系式.以此为基础用专业软件Medici和Tsuprem4对器件进行了模拟,得到了最优漂移区浓度、最优击穿电压等参数随SOI硅膜厚度的变化曲线,这些结果对实际器件的设计以及工艺生产具有参考意义.

  • 有n埋层结构的1200V横向变掺杂双RESURF LDMOS研制

    方健, 张正璠, 雷宇, 乔明, 李肇基, 张波

    Chin. J. Semicond.  2005, 26(3): 541

    Abstract PDF

    提出有n埋层的横向变掺杂双RESURF 新结构高压LDMOS器件.该结构器件与常规LDMOS相比,采用了相对较薄的外延层,使之与标准CMOS工艺的兼容性得到了改善.基于二维器件仿真软件MEDICI分析了n埋层的浓度、长度和p-降场层的杂质浓度分布对器件耐压的影响,并进行了器件和工艺的优化设计.在国内工艺生产线成功地研制出1200V高压LDMOS,并已用于1200V功率集成电路中.

  • 带有静电自检测功能的高灵敏度加速度传感器

    程保罗, 李昕欣, 王跃林, 焦继伟, 车录锋, 杨恒, 戈肖鸿, 宋朝晖

    Chin. J. Semicond.  2005, 26(3): 547

    Abstract PDF


  • 亚100nm体硅MOSFET集约I-V模型

    张大伟, 章浩, 朱广平, 张雪莲, 田立林, 余志平

    Chin. J. Semicond.  2005, 26(3): 554

    Abstract PDF

    利用“局域化”的概念和二维泊松方程的解析解,建立了沟道方向上二维量子效应对阈电压的修正模型.基于密度梯度理论,建立了多晶硅栅内量子效应对阈电压的修正模型.在此基础上,结合弹道理论,开发了一个适用于亚100nm MOSFET的集约I-V模型.通过与TSMC提供的沟长为45nm实际器件测试结果,以及与三组亚100nm MOSFET的数值模拟结果的比较,证明了该模型具有良好的精度(平均误差小于8%)和可延伸性.

  • 热电耦合微执行器温度分布的节点分析法

    黎仁刚, 黄庆安, 李伟华

    Chin. J. Semicond.  2005, 26(3): 562

    Abstract PDF


  • 宽带偏振不灵敏InGaAs半导体光放大器

    王书荣, 王圩, 刘志宏, 朱洪亮, 张瑞英, 丁颖, 赵玲娟, 周帆, 田慧良

    Chin. J. Semicond.  2005, 26(3): 567

    Abstract PDF


  • 808nm大功率半导体激光器腔面光学膜工艺

    舒雄文, 徐晨, 徐遵图, 朱彦旭, 沈光地

    Chin. J. Semicond.  2005, 26(3): 571

    Abstract PDF


  • 超高速激光驱动器电路设计与研制

    黄颋, 王志功, 李连鸣

    Chin. J. Semicond.  2005, 26(3): 576

    Abstract PDF

    分别利用0.35μm CMOS工艺和0.2μm GaAs PHEMT(pseudomorphic high electron mobility transistor)工艺实现了激光驱动器集成电路,其工作速率分别为2.5Gb/s和10Gb/s,可应用于光纤通信SDH(synchronous digital hierarchy)传输系统.

  • 一种稳定的RLC互连Π模型构建及其应用

    董刚, 高海霞, 杨银堂, 李跃进

    Chin. J. Semicond.  2005, 26(3): 580

    Abstract PDF


  • 一种新颖的4bit和5bit超宽带GaAs单片数字衰减器

    王会智, 沈亚, 蒋幼泉, 李拂晓, 张斌

    Chin. J. Semicond.  2005, 26(3): 585

    Abstract PDF

    介绍了一种新颖的DC~20GHz的4bit和5bit GaAs单片数字衰减 器的设计、制造和测试结果.该衰减器的设计采用纵向思维的方法.最终得到的4bit数字衰减器的主要性能指标是:在DC~20GHz频带内,插入损耗≤3.5dB,最大衰减量15dB,衰减步进1dB,衰减平坦度≤0.2dB,衰减精度≤±0.3dB,两端口所有态的电压驻波比≤1.6,相对于参考态,衰减态的插入相移在-10°~5°以内,芯片尺寸1.8mm×1.6mm×0.1mm.5bit数字衰减器的主要性能指标是:在DC~20GHz频带内,插入损耗≤3.8dB,最大衰减量15.5dB,衰减步进0.5dB,衰减平坦度≤0.3dB,衰减精度≤±0.4dB,两端口所有衰减态的电压驻波比≤1.8,相对于参考态,衰减态的插入相移在-14°~2°以内,芯片尺寸2.0mm×1.6mm×0.1mm.

  • 基于划分的力矢量布局算法

    程锋, 毛军发

    Chin. J. Semicond.  2005, 26(3): 590

    Abstract PDF


  • 深亚微米功耗优化的简化模型

    粟雅娟, 魏少军

    Chin. J. Semicond.  2005, 26(3): 595

    Abstract PDF


  • 优化的基于模型的光学邻近矫正算

    蔡懿慈, 王旸, 周强, 洪先龙

    Chin. J. Semicond.  2005, 26(3): 601

    Abstract PDF


  • ULSI制造中硅片化学机械抛光的运动机理

    苏建修, 郭东明, 康仁科, 金洙吉, 李秀娟

    Chin. J. Semicond.  2005, 26(3): 606

    Abstract PDF


  • 常压射频激励低温冷等离子体刻蚀光刻胶

    赵玲利, 李海江, 王守国, 叶甜春

    Chin. J. Semicond.  2005, 26(3): 613

    Abstract PDF


  • 硅各向异性腐蚀的原子级模拟

    姜岩峰, 黄庆安

    Chin. J. Semicond.  2005, 26(3): 618

    Abstract PDF


  • GaAs/AlGaAs量子级联激光器

    刘俊岐, 路秀真, 郭瑜, 刘峰奇, 王占国

    Chin. J. Semicond.  2005, 26(3): 624

    Abstract PDF


  • 7.8μm二级分布反馈量子级联激光器

    郭瑜, 刘峰奇, 刘俊岐, 路秀真, 王占国

    Chin. J. Semicond.  2005, 26(3): 627

    Abstract PDF



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