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Volume 26, Issue 6, Jun 2005

    CONTENTS

  • Two Steps B Ion-Implantation of Diamond Film Grown on an n-Type Si Substrate and Its p-n Junction Effects

    Sun Xiuping,Feng Kecheng,Li Chao, Zhang Hongxia,and Fei Yunjie

    Chin. J. Semicond.  2005, 26(6): 1073

    Abstract PDF

    Polycrystalline diamond thin films are deposited on an n-type Si substrates by hot filament chemical vapor deposition,and then are implanted with boron ions in a 200keV ion implanter.In order to achieve a better distribution of the implanted element,boron ions are implanted by two steps:implanting boron ions with the energy of 70keV first,and then with the energy of 100keV.The homogeneous distribution of the B ion is gained.The current-voltage characteristics of the samples are studied.It is found that the p-n heterojunction effect is achieved in these samples.

  • Analysis and Optimum Design of Differential Inductors Using Distributed Capacitance Model

    Jian Hongyan, Tang Zhangwen, He Jie, and Min Hao

    Chin. J. Semicond.  2005, 26(6): 1077

    Abstract PDF

    A distributed capacitance model for monolithic inductors is developed to predict the equivalently parasitical capacitances of the inductor.The ratio of the self-resonant frequency (fSR) of the differential-driven symmetric inductor to the fSR of the single-ended driven inductor is firstly predicted and explained.Compared with a single-ended configuration,experimental data demonstrate that the differential inductor offers a 127% greater maximum quality factor and a broader range of operating frequencies.Two differential inductors with low parasitical capacitance are developed and validated.

  • A Solenoid-Type Inductor Fabricated by MEMS Technique

    Gao Xiaoyu, Zhou Yong, Wang Xining, Lei Chong, Chen Ji’an,and Zhao Xiaolin

    Chin. J. Semicond.  2005, 26(6): 1083

    Abstract PDF

    A solenoid-type inductor for high frequency application is realized using a micro-electro-mechanical systems (MEMS) technique.In order to achieve a high inductance value and Q factor,UV-LIGA,dry etching technique,fine polishing and electroplating technique are adopted.The dimensions of the inductor are 1500μm×900μm×70μm,having 41 turns with a coil width of 20μm separated by 20μm spaces and a high aspect ratio of 3.5∶1.The maximum measured inductance of the inductor is 6.17nH with a Q factor of about 6.

  • A GaAs-Based MOEMS Tunable RCE Photodetector with Single Cantilever Beam

    Zhou Zhen, Han Qin, Du Yun, Yang Xiaohong, Wu Ronghan, Huang Yongqing, and Ren Xiaomin

    Chin. J. Semicond.  2005, 26(6): 1087

    Abstract PDF

    A GaAs-based micro-opto-electro-mechanical-systems(MOEMS) tunable resonant cavity enhanced(RCE) photodetector with a continuous tuning range of 31nm under a 6V tuning voltage is demonstrated.The single cantilever beam structure is adopted for this MOEMS tunable RCE photodetector.The maximum and minimum peak quantum efficiency during the tuning are 36.9% and 30.8%,respectively.The maximum and minimum full-widthathalf-maximum (FWHM) are 20nm and 14nm,respectively.The dark current density is 7.46A/m2 without bias.

  • Monolithically Integrated Laser Diode and Electroabsorption Modulator with Dual- Waveguide Spot-Size Converter Output

    Hou Lianping, Wang Wei, Feng Wen,Zhu Hongliang, Zhou Fan, Wang Lufeng, and Bian Jing

    Chin. J. Semicond.  2005, 26(6): 1094

    Abstract PDF

    A 1.60μm laser diode and electroabsorption modulator monolithically integrated with a novel dual-waveguide spot-size converter output for low-loss coupling to a cleaved single-mode optical fiber are demonstrated.The devices emit in a single transverse and quasi single longitudinal mode with an SMSR of 25.6dB.These devices exhibit a 3dB modulation bandwidth of 15.0GHz,and modulator DC extinction ratios of 16.2dB.The output beam divergence angles of the spot-size converter in the horizontal and vertical directions are as small as 7.3°×18.0°,respectively,resulting in a 3.0dB coupling loss with a cleaved single-mode optical fiber.

  • Butt-Joint Monolithically Integrated DFB-LD/EA-MD Light Source for 10Gbit/s Transmission

    Li Baoxia, Hu Xiaohua, Zhu Hongliang, Wang Baojun, Bian Jing, Zhao Lingjuan,and Wang Wei

    Chin. J. Semicond.  2005, 26(6): 1100

    Abstract PDF

    This paper reports on the design,fabrication,and performance of an integrated electro-absorptive modulated laser based on butt-joint configuration for 10Gbit/s application.This paper mainly aims at two aspects.One is to improve the optical coupling between the laser and modulator;another is to increase the bandwidth of such devices by reducing the capacitance parameter of the modulator.The integrated devices exhibit high static and dynamic characteristics. Typical threshold current is 15mA,with some value as low as 8mA.Output power at 100mA is more than 10mW.The extinction characteristics,modulation bandwidth,and electrical return loss are measured.3dB bandwidth more than 10GHz is monitored.

  • Optimization of Plasma Etching Parameters and Mask for Silica Optical Waveguides

    Zhou Libing, Liu Wen, and Wu Guoyang

    Chin. J. Semicond.  2005, 26(6): 1104

    Abstract PDF

    Optical waveguides in silica-on-silicon are one of the key elements in optical communications.The processes of deep etching silica waveguides using resist and metal masks in RIE plasma are investigated.The etching responses,including etching rate and selectivity as functions of variation of parameters,are modeled with a 3D neural network.A novel resist/metal combined mask that can overcome the single-layer masks’ limitations is developed for enhancing the waveguides deep etching and low-loss optical waveguides are fabricated at last.

  • A Compact Ka-Band PHEMT MMIC Voltage Controlled Oscillator

    Yu, Wen,Sun, Xiaowei,Qian, Rong,and, Zhang, Yimen

    Chin. J. Semicond.  2005, 26(6): 1111

    Abstract PDF

    A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced to reduce the chip size and to increase the bandwidth of operation.The procedure to design a MMIC VCO is also described here.The measured oscillating frequency of the MMIC VCO is 36±1.2GHz and the output power is 10±1dBm.The fabricated MMIC chip size is 1.3mm×1.0mm.

  • RF-MBE Grown AlGaN/GaN HEMT Structure with High Al Content

    Wang Xiaoliang, Wang Cuimei, Hu Guoxin, Wang Junxi, Liu Xinyu, Liu Jian, Ran Junxue, Qian He, Zeng Yiping, and Li Jinmin

    Chin. J. Semicond.  2005, 26(6): 1116

    Abstract PDF

    A Si doped AlGaN/GaN HEMT structure with high Al content (x=43%) in the barrier layer is grown on sapphire substrate by RF-MBE.The structural and electrical properties of the heterostructure are investigated by the triple axis Xray diffraction and Van der PauwHall measurement,respectively.The observed prominent Bragg peaks of the GaN and AlGaN and the Hall results show that the structure is of high quality with smooth interface.The high 2DEG mobility in excess of 1260cm2/(V·s) is achieved with an electron density of 1.429e13cm-2 at 297K,corresponding to a sheet-densitymobility product of 1.8e16V-1·s-1.Devices based on the structure are fabricated and characterized.Better DC characteristics,maximum drain current of 1.0A/mm and extrinsic transconductance of 218mS/mm are obtained when compared with HEMTs fabricated using structures with lower Al mole fraction in the AlGaN barrier layer.The results suggest that the high Al content in the AlGaN barrier layer is promising in improving material electrical properties and device performance.

  • A VHF PECVD Micro-Crystalline Silicon Bottom Gate TFT with a Thin Incubation Layer

    Li Juan, Zhao Shuyun, Liu Jianping, Wu Chunya, Zhang Xiaodan, Meng Zhiguo, Zhao Ying,Xiong Shaozhen,Zhang Lizhu,and Jang Jin

    Chin. J. Semicond.  2005, 26(6): 1121

    Abstract PDF

    The incubation layer with amorphous structure between the substrate and crystalline layer may obviously affect the performance for a microcrystalline Si thin film transistor (μc-Si TFT),especially for the bottom gate TFT(BGTFT).It is found that decreasing the ratio of SiH4/(H2+SiH4) is an effective way to decrease the incubation layer thickness of μc-Si directly deposited by VHF PECVD without any further thermal or laser treatment.Based on the μc-Si with a thin incubation layer,the BG-TFT with Al/SiNx/μc-Si/n+μc-Si/Al structure is fabricated.The ratio of on-state current to off-state current is up to 10.6,the mobility is around 0.7cm2/(V·s),and the threshold voltage is about 5V.

  • A High Performance InP HEMT with Saw-Toothed Source and Drain

    Zhang Haiying, Liu Xunchun, Yin Junjian, Chen Liqiang, Wang Runmei, Niu Jiebin, and Liu Ming

    Chin. J. Semicond.  2005, 26(6): 1126

    Abstract PDF

    Millimeterwave transistor technology is very important for MMIC design and fabrication.An InP HEMT with sawtoothed source and drain is described.The pattern distortion due to the proximity effect of lithography is avoided.High yield InP HEMT with good DC and RF performances is obtained.The device transconductance is 1050mS/mm,threshold voltage is -1.0V,and current gain cut off frequency is 120GHz.

  • A 12bit 300MHz Current-Steering CMOS D/A Converter

    Ni Weining, Geng Xueyang,and Shi Yin

    Chin. J. Semicond.  2005, 26(6): 1129

    Abstract PDF

    The proposed DAC consists of a unit current-cell matrix for 8MSBs and a binary-weighted array for 4LSBs,trading-off between the precision,speed,and size of the chip.In order to ensure the linearity of the DAC,a double Centro symmetric current matrix is designed by the Q2 random walk strategy.To achieve better dynamic performance,a latch is added in front of the current switch to change the input signal,such as its optimal crosspoint and voltage level.For a 12bit resolution,the converter reaches an update rate of 300MHz.

  • 非对称耦合双量子点中激子的动力学行为

    刘灿德, 苏希玉, 刘玉申, 张会云

    Chin. J. Semicond.  2005, 26(6): 1135

    Abstract PDF

    利用二能级近似理论分析了外场驱动下非对称耦合双量子点中激子的动力学行为,并给出了局域化的条件.分析发现:当外场振幅较小时,库仑相互作用扮演着重要角色,激子的动力学行为主要发生在低能级子空间,场强和频率之比是Bessel方程的根时,准能发生回避交叉,激子的局域化现象发生.随着外场振幅增大,激子解体,电子和空穴可以独立在量子点之间隧穿.借助于Floquet理论,进行了数值计算,计算结果与理论分析相符.

  • 深能级杂质Zn对n型硅半导体的补偿特性

    蔡志军, 巴维真, 陈朝阳, 崔志明, 丛秀云

    Chin. J. Semicond.  2005, 26(6): 1140

    Abstract PDF

    为得到高B值(材料常数)的单晶热敏材料,采用高温气相扩散的方法在n型硅中掺杂深能级杂质Zn,得到高补偿的硅材料,并对该材料特性进行了测试和分析.结果表明:这种补偿硅具有热敏特性,该材料的B值为6300K左右,其阻值对温度的依赖关系与杂质的补偿程度有关.

  • 多晶CdS/CdTe异质结界面的能带偏移

    黄代绘, 吴海霞, 李卫, 冯良桓

    Chin. J. Semicond.  2005, 26(6): 1144

    Abstract PDF

    采用真空蒸发法制备了CdS和CdTe,并对其结构和光学性质进行了研究.原位制备了衬底沿(001)高度择优取向的CdS/CdTe异质结,研究了其结构、电子学性质.获得的CdS/CdTe半导体异质结的价带偏移ΔEV=0.98eV±0.05eV,导带偏移ΔEc=0.07±0.1eV.

  • GSMBE外延生长SGOI材料的退火行为

    刘超, 高兴国, 李建平, 曾一平, 李晋闽

    Chin. J. Semicond.  2005, 26(6): 1149

    Abstract PDF

    在SIMOX SOI超薄硅衬底上外延生长了高质量SiGe合金薄膜来制备SGOI(SiGe on insulator)样品,并研究了其在1050℃氧化气氛中的高温退火行为.用Raman,DCXRD,RBS和光学显微镜等分析手段对SGOI样品在退火前后的性能进行了表征.分析结果表明:SGOI样品表面的穿透位错密度约为5e5cm-2;高温退火处理可以促进SGOI样品中异质外延生长SiGe合金薄膜的弛豫化和超薄Si夹层向SiGe合金薄膜的转化,进一步提高SiGe薄膜的晶体质量,并且有助于获得高Ge组分的SGOI材料.

  • 氧化Au/Ni/p-GaN欧姆接触形成的机理

    胡成余, 秦志新, 冯振兴, 陈志忠, 杨华, 杨志坚, 于彤军, 胡晓东, 姚淑德, 张国义

    Chin. J. Semicond.  2005, 26(6): 1154

    Abstract PDF

    用卢瑟福背散射(RBS)和同步辐射X射线衍射(XRD)研究了p-GaN上的Ni/Au电极在空气下不同温度合金后的微结构的演化,并揭示这种接触结构的欧姆接触形成机制.研究不同温度下比接触电阻(ρc)的变化,发现从450℃开始Au扩散到GaN的表面在p-GaN上形成外延结构以及O向电极内部扩散反应生成NiO对降低ρc起到了关键的作用.在500℃时,Au的外延结构进一步改善,O进一步向样品内部扩散生成NiO,ρc也达到了最低值.但当合金温度升高到600℃时,金属-半导体界面NiO的大部分或全部向外扩散,从而脱离与p-GaN的接触,使ρc显著升高.

  • 掺Si对AlGaInP/GaInP多量子阱发光性能的影响

    李述体, 范广涵, 周天明, 郑树文, 王浩, 郭志友, 孙慧卿

    Chin. J. Semicond.  2005, 26(6): 1159

    Abstract PDF

    研究了Si掺杂对MOCVD生长的(Al0.3Ga0.7)In0.5P/Ga0.5In0.5P多量子阱发光性能的影响.样品分为两类:一类只生长了(Al0.3Ga0.7)In0.5P/Ga0.5In0.5P多量子阱结构;另一类为完整的多量子阱LED结构.对于只生长了(Al0.3Ga0.7)In0.5P/Ga0.5In0.5P多量子阱结构的样品,掺Si没有改变量子阱发光波长,但使得量子阱发光强度略有下降,发光峰半高宽明显增大.这应是掺Si使量子阱界面质量变差导致的.而在完整LED结构的情况下,掺Si却大大提高了量子阱的发光强度.相对于未掺杂多量子阱LED结构,垒层掺Si使多量子阱的发光强度提高了13倍,阱层和垒层均掺Si使多量子阱的发光强度提高了28倍,并对这一现象进行了讨论.

  • 弱硼掺杂补偿对氢化微晶硅薄膜制备与特性的影响

    黄君凯, 杨恢东

    Chin. J. Semicond.  2005, 26(6): 1164

    Abstract PDF

    研究了弱硼掺杂补偿对甚高频等离子体增强化学气相沉积方法生长氢化微晶硅薄膜(μc-Si∶H)及材料特性的影响.实验发现,随着弱硼补偿剂量的增大,μc-Si∶H薄膜的沉积速率先减小后增加,变化范围约为0.7~0.8nm/s.相比较而言,材料的结晶度以及晶粒的平均颗粒尺寸则呈现出先增后减的变化,且变化的幅度较大,当弱硼补偿剂量大于2.5ppm时,过度的弱硼补偿将导致μc-Si∶H薄膜的结晶状况恶化.此外,光敏性、暗电导及电导激活能的测量结果进一步表明,弱硼补偿显著影响μc-Si∶H薄膜的光电特性,弱硼补偿剂量为2.5ppm左右时,材料的光电特性最为理想.因此,优化弱硼补偿剂量是获得器件级质量μc-Si∶H材料的有效途径.

  • 蓝宝石衬底上单晶InN外延膜的RF-MBE生长

    肖红领, 王晓亮, 张南红, 王军喜, 刘宏新, 韩勤, 曾一平, 李晋闽

    Chin. J. Semicond.  2005, 26(6): 1169

    Abstract PDF

    采用低温氮化铟(InN)缓冲层,利用射频等离子体辅助分子束外延(RF-MBE)方法在蓝宝石衬底上获得了晶体质量较好的单晶InN外延膜.用光学显微镜观察所外延的InN单晶薄膜,表面无铟滴.InN(0002)双晶X射线衍射摇摆曲线的半高宽为14′;用原子力显微镜测得的表面平均粗糙度为3.3nm;Hall测量表明InN外延膜的室温背景电子浓度为3.3e18cm-3,相应的电子迁移率为262cm2/(V·s).

  • 光电薄膜SnS的制备及其性能

    程树英, 黄赐昌, 陈岩清, 陈国南

    Chin. J. Semicond.  2005, 26(6): 1173

    Abstract PDF

    在溶液的pH=2.7,离子浓度比Sn2+/S2O2-3=1/5和电流密度J=3.0mA/cm2的条件下,用阴极恒电流沉积法在ITO导电玻璃基片上制备出了Sn0.995S1.005膜层,并用扫描电镜观察了该薄膜的表面形貌,发现其颗粒较均匀,粒径大小在200~800nm之间.用X射线衍射分析了其物相结构,表明它是具有正交结构的SnS多晶薄膜.通过测量薄膜样品的透射光谱和反射光谱,计算得到其直接禁带宽度Eg=1.23eV.用四探针法测得其导电类型为p型,电阻率为7.5Ω·cm.

  • GaAs Microtips Grown by Selective LPE for SNOM Sensors

    Zhang Hongzhi, Hu Lizhong, Sun Xiaojuan, Wang Zhijun, Liang Xiuping

    Chin. J. Semicond.  2005, 26(6): 1178

    Abstract PDF

    Selective liquid phase epitaxy(LPE) is used to fabricate GaAs microtips for scanning near-field optical microscopy(SNOM) sensors.The (001) GaAs substrates are used instead of the wafers of a vertical-cavity surface-emitting laser during the preliminary experiments.Scanning electron microscopy(SEM) images show that in appropriate conditions the microtips are pyramid-like and distribute uniformly on the wafers.This method not only settles the problem of aligning the microtips with light-emitting windows of VCSEL,but also has practical values in batch production and parallel scanning with several microtips.

  • 适用于高品质射频集成电感的多孔硅新型衬底制备技术

    周毅, 杨利, 张国艳, 黄如

    Chin. J. Semicond.  2005, 26(6): 1182

    Abstract PDF

    提出了背向选区腐蚀生长多孔硅的集成电感衬底结构.ASITIC模拟证明,该新型衬底结构的集成电感在高频下仍具有较高的品质因子.采用此工艺,在固定腐蚀液配比的条件下,变化电流密度和阳极氧化时间,制备出了高质量的厚膜多孔硅,并测量了多孔硅的生长厚度、孔径大小和表面形貌,得出了多孔硅生长速率随阳极氧化时间和电流密度的变化关系,为背向选区腐蚀工艺制备高品质硅基集成电感奠定了理论和实验基础.

  • 应用于深亚微米DSOI器件的埋氧层的制备

    陶凯, 董业民, 易万兵, 王曦, 邹世昌

    Chin. J. Semicond.  2005, 26(6): 1187

    Abstract PDF

    利用低剂量、低能量的SIMOX(separation by implanted oxygen)图形化技术实现了深亚微米间隔埋氧层的制备.在二氧化硅掩膜尺寸为172nm的情况下,可以得到间隔为180nm的埋氧层.通过TEM(transmission electron microscope)观察发现埋层形貌完整、界面陡峭、无硅岛及其他缺陷.该结果为DSOI(dain/source on insulator)器件向更小尺寸发展奠定了工艺基础.

  • 一种基于非平衡态格林函数的准三维FinFET模型

    邵雪, 余志平

    Chin. J. Semicond.  2005, 26(6): 1191

    Abstract PDF

    提出了一种针对FinFET器件的准三维量子力学模型.采用非平衡态格林函数方法计算器件中的弹道输运电流,同时在器件垂直于沟道方向的横截面上求解二维的薛定谔方程来得到载流子的态密度分布,最终实现与三维泊松方程的自恰求解.模拟结果显示纳米尺度的FinFET器件具有良好的开关特性和亚阈值特性.这个模型还能适用于量子线等其他三维结构的纳米器件.

  • Ni(Zr)Si薄膜热稳定性及其肖特基势垒二极管的电学特性

    黄伟, 卢建政, 张利春, 高玉芝, 金海岩

    Chin. J. Semicond.  2005, 26(6): 1197

    Abstract PDF

    提出在Ni中掺入夹层Zr的方法来提高NiSi的热稳定性.具有此结构的薄膜,600~800℃快速热退火后,薄层电阻保持较低值,小于2Ω/□.经XRD和Raman光谱分析表明,薄膜中只存在低阻NiSi相,而没有高阻NiSi2相生成.Ni(Zr)Si的薄层电阻由低阻转变为高阻的温度在800℃以上,比没有掺Zr的镍硅化物的转变温度上限提高了100℃.Ni(Zr)Si/Si肖特基势垒二极管能够经受650~800℃不同温度的快速热退火,肖特基接触特性良好,肖特基势垒高度为0.63eV,理想因子接近于1.

  • 退火过程中RP缺陷模型及数值模拟

    励晔, 夏建新, 安娜

    Chin. J. Semicond.  2005, 26(6): 1203

    Abstract PDF

    根据一维动力学方程,提出了RP缺陷的演化模型,用于描述离子注入后硼杂质分布在退火过程中出现异常变化的物理现象.通过分析发现缺陷随退火时间呈指数变化,根据变化的时间常数与RP缺陷对间隙原子束缚能的大小有关的原理,提出RP缺陷对间隙原子的束缚能为2.41eV.将该模型模拟硼杂质随退火时间的分布时,得到缺陷的分布与硼原子的分布变化趋势一致,且变化的时间常数相近,这给出了退火中硼出现异常分布的一种新的解释.

  • 光电耦合器件g-r噪声模型

    包军林, 庄奕琪, 杜磊, 吴勇, 马仲发

    Chin. J. Semicond.  2005, 26(6): 1208

    Abstract PDF

    在宽范围偏置条件下,测量了光电耦合器件的g-r(产生-复合)噪声.实验结果表明,随着偏置电流的增加,g-r噪声逐渐向高频移动,其噪声幅值呈现先增加后减小的变化规律.通过测量前级噪声和后级噪声,发现光电耦合器件g-r噪声来源于后级的光敏三极管.基于载流子数涨落机制,建立了一个光电耦合器件g-r噪声的定量分析模型.实验结果和本文模型符合良好.

  • 基于MEMS技术新型硅磁敏三极管负阻-振荡特性

    赵晓锋, 温殿忠

    Chin. J. Semicond.  2005, 26(6): 1214

    Abstract PDF

    介绍了一种新型硅磁电负阻振荡器件——S型负阻-振荡硅磁敏三极管.该器件是基于MEMS技术在p型高阻单晶硅片上制作的具有立体结构的新型磁电转换器件,采用KOH各向异性腐蚀技术实现发射区及引线的制作.实验结果表明,集电极电流随外加磁场的变化而变化;在基极注入电流一定时,出现集电极电流受外加偏压VCE调制的负阻-振荡特性,且集电极电流振荡随外加磁场而变化.对该器件负阻振荡特性的形成机理进行了讨论,结果表明,在集电区n+π结和基区与π区形成的p+π结均处于反偏条件下,当π区满足雪崩倍增效应产生的条件时,该磁敏三极管伏-安特性曲线中的Vp+π偏压相对应的基极注入条件下的集电极电流出现S型负阻-振荡特性.在发射极和基极间的n+π结和p+π结附近存在的大量深能级杂质将对负阻-振荡特性进行调制.

  • 电阻栅结构负阻异质结双极晶体管

    郭维廉, 齐海涛, 张世林, 钟鸣, 梁惠来, 毛陆虹, 宋瑞良, 胡海洋

    Chin. J. Semicond.  2005, 26(6): 1218

    Abstract PDF

    设计并研制成功了具有电阻栅结构的n-InGaP/p-GaAs/n-GaAs负阻异质结双极晶体管.研制出的器件I-V特性优于相关文献的报导;得到了恒定电压和恒定电流两种模式的负阻特性曲线;对两种模式负阻特性产生的物理机制进行了解释;最后对此器件的应用前景进行了预测.

  • 基于扣除法的半导体激光器高频响应仿真新方法

    张尚剑, 刘超, 伞海生, 祝宁华

    Chin. J. Semicond.  2005, 26(6): 1224

    Abstract PDF

    基于激光器速率方程和等效电路模型对激光器高频响应特性进行分析,提出了一种采用激光器频率响应扣除法提取有源区本征响应和预测激光器整体频率响应的仿真新方法.用该方法对实验样品的高频调制响应进行了仿真,仿真结果与实际测量数据相吻合.

  • 表面粘连效应对接触式微开关接触电阻的影响

    黄见秋, 黄庆安

    Chin. J. Semicond.  2005, 26(6): 1229

    Abstract PDF

    建立了一个微开关接触电阻模型.模型将粗糙的触头表面理想化为多微丘结构,并考虑了表面粘连效应,给出了接触电阻与接触力之间的变化关系.结果显示,在低接触力下,粘连效应十分重要.粘连模型与Majumder等人所建立的模型以及实验值的比较结果表明,粘连效应可以用来解释弹性模型与实验之间的偏差.

  • 折叠内插模数转换器分析及实现

    陈诚, 毛静文, 王照钢, 任俊彦, 闵昊

    Chin. J. Semicond.  2005, 26(6): 1234

    Abstract PDF

    应用Matlab/Simulink工具对折叠内插模数转换器进行了建模,研究了具有8bit分辨率、200MHz采样频率的该模数转换器的芯片设计和实现.系统设计时采用Matlab/Simulink进行行为级建模并分别分析了预放大的增益、折叠电路的带宽以及比较器的失调对动态性能的影响.设计实现的模数转换器实测结果表明,积分非线性误差和微分非线性误差分别小于0.77和0.6LSB,在采样频率为200MHz及输入信号频率为4MHz时,信号与噪声及谐波失真比为43.7dB.电路采用标准0.18μm CMOS数字工艺实现,电源电压为3.3V,功耗181mW,芯核面积0.25mm2.

  • 用低温金属电镀技术制造与封装的惯性微型电学开关

    马薇, Yitshak, Zohar, 王文

    Chin. J. Semicond.  2005, 26(6): 1239

    Abstract PDF

    运用光刻胶为注模的多次互不干扰金属电镀技术实现了惯性微型电学开关的低温制造与封装.电镀技术的低温过程可使微型开关直接成形于预先制作好的含有电子信号处理电路的基底上,加上同样借助于低温金属电镀技术的基于整个硅晶片的倒装封装,直接形成环绕各个器件的密封腔体.这一技术最终将使得模块化生产成为现实.微型开关的高度和它的密封腔的高度可以分别控制.电子信号可以通过金属互连线进入密封腔体.为了便于设计,建立了一个既简单又相对准确的“弹簧质量块”模型.以此设计的惯性开关,即使在未封装的常温、常压条件下,均可工作1e9次以上.本文对密封腔体的强度和密封性,以及金属互连线的可靠性,都作了详细的检测,各项指标均达到其各自的标准.

  • 灌封胶封装对高量程MEMS加速度计动态性能的影响

    蒋玉齐, 程迎军, 张鲲, 李昕欣, 罗乐

    Chin. J. Semicond.  2005, 26(6): 1245

    Abstract PDF

    利用有限元模拟方法,对一种压阻式高量程MEMS加速度计进行了10万g峰值的半正弦加速度脉冲下的响应分析.灌封胶弹性模量的变化对高量程加速度计输出电压信号的影响可以忽略,且模拟输出电压的峰值与解析解接近.应力分析表明,芯片粘结胶、芯片与芯片盖板之间封接胶环的等效应力均随灌封胶弹性模量的增加而减小;弹性模量在4GPa以上的灌封胶适宜用来保护芯片.动态有限元模拟结果与自由落杆测试结果接近.

  • 具有片上数字控制频率调谐的9MHz有源RC滤波器

    吴恩德, 姚金科, 王志华

    Chin. J. Semicond.  2005, 26(6): 1250

    Abstract PDF

    讨论了适用于无线局域网零中频收信机的4阶切比雪夫有源RC滤波器,为消除工艺偏差和环境变化对截止频率的影响,提出片上数字控制频率调谐电路.采用TSMC 0.25μm 1P5M CMOS工艺进行制造,测得调谐锁定时,滤波器的截止频率为9MHz,通带增益为0dB,增益波动小于1dB,带外抑制在30MHz处小于-40dB,通带内噪声小于-142dBm/Hz,当两输入信号的功率为-10dBm时,三阶交调小于-70dBm.

  • 在SOI基上设计实现D/A驱动的高压LDMOS开关电路

    雷宇, 方健, 张波, 李肇基

    Chin. J. Semicond.  2005, 26(6): 1255

    Abstract PDF

    设计实现SOI基上带有D/A驱动的高压LDMOS功率开关电路,利用D/A变换的灵活性,运用数字电路与高压模拟电路混合设计方法,实现数字控制的耐压为300V的LDMOS功率开关电路.该功率集成电路芯片的实现,为SOI高压功率开关电路提供了一种更为方便快速的数字控制设计方法,同时也为功率系统集成电路提供了一种有效的实验验证,从而证实了功率系统集成的探索在理论上以及工程上具有一定的可行性.

  • IC参数成品率全局优化的映射距离最小化算法

    荆明娥, 李康, 王俊平, 郝跃

    Chin. J. Semicond.  2005, 26(6): 1259

    Abstract PDF

    提出了一种新的集成电路参数成品率的全局优化算法——映射距离最小化算法.该算法采用了均匀设计与映射距离最小的耦合优化,每次迭代模拟次数很少,优化过程明显加速.另外,给出了一种粗略估计空间点集均匀性的方法——k近邻密度估计,在有效时间内判断一个空间点集的均匀性.模拟结果表明,该算法对集成电路进行快速成品率优化设计及提高电路设计的稳定性具有较好的应用价值.

  • 一种用于SRAM快速仿真的模型

    张锋, 周玉梅, 黄令仪

    Chin. J. Semicond.  2005, 26(6): 1264

    Abstract PDF

    根据静态随机存储器(SRAM)电路及版图的设计特点,提出了一种新的可用于SRAM设计的快速仿真计算模型.该模型仿真快速准确,能克服Spice仿真软件对大容量SRAM版图后仿真速度较慢的缺点,在很大程度上缩短了设计周期.同时,它的仿真结果同Synopsys公司的Nanosim软件仿真结果相比偏差小于5%.该模型在龙芯Ⅱ号CPU的SRAM设计中得到了应用;芯片采用的是中芯国际0.18μm CMOS工艺.流片验证了该模型对于大容量的SRAM设计是准确而有效的.

  • 注氮工艺对SOI材料抗辐照性能的影响

    张恩霞, 钱聪, 张正选, 王曦, 张国强, 李宁, 郑中山, 刘忠立

    Chin. J. Semicond.  2005, 26(6): 1269

    Abstract PDF

    分别采用一步和分步注入的工艺制备了氧氮共注形成SOI(SIMON)材料,并对退火后的材料进行了二次离子质谱(SIMS)分析,结果发现退火之后氮原子大多数聚集在SiO2/Si界面处.为了分析材料的抗辐照加固效果,分别在不同方法制作的SIMON材料上制作了nMOS场效应晶体管,并测试了晶体管辐射前后的转移特性.实验结果表明,注氮工艺对SOI材料的抗辐照性能有显著的影响.

  • 芯片叠层封装的失效分析和热应力模拟

    顾靖, 王珺, 陆震, 俞宏坤, 肖斐

    Chin. J. Semicond.  2005, 26(6): 1273

    Abstract PDF

    通过高温高湿加速实验对双芯片叠层封装器件的失效进行了研究,观察到存在塑封料与上层芯片、BT基板与塑封料或贴片胶的界面分层和下层芯片裂纹等失效模式.结合有限元分析对器件内热应力分布进行了计算模拟,分析了芯片裂纹的失效机理,并从材料性能和器件结构角度讨论了改善叠层封装器件可靠性的方法.

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