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Volume 26, Issue 8, Aug 2005


  • MBE Growth of High Electron Mobility InP Epilayers

    Shu Yongchun, Yao Jianghong, Lin Yaowang, Xing Xiaodong,Pi Biao, Xu Bo, Wang Zhanguo, and Xu Jingjun

    Chin. J. Semicond.  2005, 26(8): 1485

    Abstract PDF

    The molecular beam epitaxial growth of high quality epilayers on (100) InP substrate using a valve phosphorous cracker cell over a wide range of P/In BEP ratio (2.0~7.0) and growth rate (0.437 and 0.791μm/h).Experimental results show that electrical properties exhibit a pronounced dependence on growth parameters,which are growth rate,P/In BEP ratio,cracker zone temperature,and growth temperature.The parameters have been optimized carefully via the results of Hall measurements.For a typical sample,77K electron mobility of 4.57e4cm2/(V·s) and electron concentration of 1.55e15cm-3 have been achieved with an epilayer thickness of 2.35μm at a growth temperature of 370℃ by using a cracking zone temperature of 850℃.

  • Design and Fabrication of a High-Voltage nMOS Device

    Li Hua, Song Limei, Du Huan, and Han Zhengsheng

    Chin. J. Semicond.  2005, 26(8): 1489

    Abstract PDF

    High-voltage nMOS devices are fabricated successfully and the key technology parameters of the process are optimized by TCAD software.Experiment results show that the device’s breakdown voltage is 114V,the threshold voltage and maximum driven ability are 1.02V and 7.5mA(W/L=50),respectively.Experimental results and simulation ones are compared carefully and a way to improve the breakdown performance is proposed.

  • Fabrication and Simulation of an AlGaAs/GaAs Ultra-Thin Base NDR HBT

    Qi Haitao, Zhang Shilin, Guo Weilian, Liang Huilai, and Mao Luhong

    Chin. J. Semicond.  2005, 26(8): 1495

    Abstract PDF

    A novel mesa ultra-thin base AlGaAs/GaAs HBT is designed and fabricated with wet chemical selective etch technique and monitor electrode technique.It has a particular and obvious voltage-controlled NDR whose PVCR is larger than 120.By use of device simulation,the cause of NDR is that increasing collector voltage makes the ultra-thin base reach through and the device transforms from a bipolar state to a bulk barrier state.In addition,the simulated cutoff frequency is about 60~80GHz.

  • High Speed VCSEL-Based Parallel Optical Transmission Modules

    Chen Hongda, Shen Rongxuan, Pei Weihua, Jia Jiuchun, Tang Jun, Zhou Yi,and Xu Xingsheng

    Chin. J. Semicond.  2005, 26(8): 1500

    Abstract PDF

    Design and fabrication of a parallel optical transmitter are reported.The optimized 12 channel parallel optical transmitter,with each channel’s data rate up to 3Gbit/s,is designed,assembled,and measured.A topemitting 850nm vertical cavity surface emitting laser(VCSEL) array is adopted as the light source,and the VCSEL chip is directly wire bonded to a 12 channel driver IC.The outputs of the VCSEL array are directly butt coupled into a 12 channel fiber array.Small form factor pluggable (SFP) packaging technology is used in the module to support hot pluggable in application.The performance results of the module are demonstrated.At an operating current of 8mA,an eye diagram at 3Gbit/s is achieved with an optical output of more than 1mW.

  • An Electroabsorption Modulator Monolithically Integrated with a Semiconductor Optical Amplifier and a Dual-Waveguide Spot-Size Converter

    Hou Lianping, Wang Wei, Zhu Hongliang, Zhou Fan, Wang Lufeng, and Bian Jing

    Chin. J. Semicond.  2005, 26(8): 1504

    Abstract PDF

    A semiconductor optical amplifier and electroabsorption modulator monolithically integrated with a spot-size converter input and output is fabricated by means of selective area growth,quantum well intermixing,and asymmetric twin waveguide technology.A 1550~1600nm lossless operation with a high DC extinction ratio of 25dB and more than 10GHz 3dB bandwidth are successfully achieved.The output beam divergence angles of the device in the horizontal and vertical directions are as small as 7.3°×18.0°,respectively,resulting in a 3.0dB coupling loss with a cleaved single-mode optical fiber.

  • Monte Carlo Analysis of Yield and Performance of a GaAs Flash ADC

    Zhang Youtao, Wang Yang, Xia Guanqun, Li Fuxiao, and Yang Naibin

    Chin. J. Semicond.  2005, 26(8): 1509

    Abstract PDF

    Monte Carlo methods are used to analyze yields and performance of GaAs flash ADCs.Due to the nonuniformity of threshold voltage,the DNL and INL of flash ADC will decrease approximately linearly.And the higher the resolution of ADC is,the faster these key nonlinear parameters decrease.When the nonuniformity increases to some degree,the yields of GaAs flash ADCs will decrease exponentially,and the missing code will increase more quickly for the higher resolution ADCs.So,GaAs HBT and HEMT with technology of etching stop will be widely used in high speed and high resolution ADCs.

  • Yield Modeling of Rectangular Defect Outline

    Wang, Junping, and, Hao, Yue

    Chin. J. Semicond.  2005, 26(8): 1514

    Abstract PDF

    In integrated circuits,the defects associated with photolithography are assumed to be in the shape of circular discs in order to perform the estimation of yield and fault analysis.However,real defects exhibit a great variety of shapes.In this paper,a novel yield model is presented and the critical area model of short circuit is correspondingly provided.In comparison with the circular model corrently available,the new model takes the similarity shape to an original defect,the two-dimensional distributional characteristic of defects,the feature of a layout routing and the character of yield estimation into account.As for the aspect of prediction of yield,the experimental results show that the new model may predict the yield caused by real defects more accurately than the circular model does.It is significant that the yield is accurately estimated and improved using the proposed model.

  • Wet Oxidation of AlxGa1-xAs/GaAs Distributed Bragg Reflectors

    Li Ruoyuan, Wang Zhanguo, Xu Bo, Jin Peng, Zhang Chunling, Guo Xia, and Chen Min

    Chin. J. Semicond.  2005, 26(8): 1519

    Abstract PDF

    The wet oxidation of AlGaAs with high Al content in a distributed Bragg reflectors (DBR) is studied by scanning electron microscopy (SEM) and transmission electron microscopy (TEM).Some voids distribute along the oxide/GaAs interfaces due to the stress induced by the wet oxidation of the AlGaAs layers.These voids decrease the shrinkage of the Al2O3 layers to 8% instead of the theoretical 20% when compared to the unoxidized AlGaAs layers.With the extension of oxidation time,the reactants are more completely transported to the front interface and the products are more completely transported out along the porous interfaces.As a result,the oxide quality is better.

  • A CMOS Fully Integrated Frequency Synthesizer with Stability Compensation

    He Jie, Tang Zhangwen, Min Hao, and Hong Zhiliang

    Chin. J. Semicond.  2005, 26(8): 1524

    Abstract PDF

    A complete closed-loop third-order s-domain model is analyzed for a frequency synthesizer.Based on the model and root-locus technique,the procedure for parameters design is described,and the relationship between the process,voltage,and temperature variation of parameters and the loop stability is quantitatively analyzed.A variation margin is proposed for stability compensation.Furthermore,a simple adjustable current cell in the charge pump is proposed for additional stability compensation and a novel VCO with linear gain is adopted to limit the total variation.A fully integrated frequency synthesizer from 1 to 1.05GHz with 250kHz channel resolution is implemented to verify the methods.

  • 2.5Gb/s Monolithic IC of Clock Recovery,Data Decision,and 1∶4 Demultiplexer

    Chen Yingmei, Wang Zhigong, Xiong Mingzhen, and Zhang Li

    Chin. J. Semicond.  2005, 26(8): 1532

    Abstract PDF

    A high integrated monolithic IC,with functions of clock recovery,data decision,and 1∶4 demultiplexer,is implemented in 0.25μm CMOS process for 2.5Gb/s fiberoptic communications.The recovered and frequency divided 625MHz clock has a phase noise of -106.26dBc/Hz at 100kHz offset in response to a 2.5Gb/s PRBS input data (2~31-1).The 2.5Gb/s PRBS data are demultiplexed to four 625Mb/s data.The 0.97mm×0.97mm IC consumes 550mW under a single 3.3V power supply (not including output buffers).

  • A Novel Multi-Functional Leakage Current Protector IC Design

    Han Yan, Wang Ze, Yu Hong, and Xie Junjie

    Chin. J. Semicond.  2005, 26(8): 1537

    Abstract PDF

    A novel type of leakage current protector chip,implemented in the mixed-signal 0.6μm CMOS process,is presented.This chip has the advantages of low power dissipation (10mW),accurate protection control based on digital response delay time and integration of multi-functions such as leakage current/over-voltage/over-load detection and protection,auto switch-on and so forth.Additionally,the chip is programmable to suit different threelevel protection applications with a high anti-interference ability.

  • 高剂量离子注入直接形成Ge纳米晶的物理机理

    胡强, 卢铁城, 敦少博, 张松宝, 唐彬, 代君龙, 朱莎, 王鲁闽

    Chin. J. Semicond.  2005, 26(8): 1543

    Abstract PDF


  • 铸造多晶硅中铁的磷吸杂和氢钝化机理

    陈金学, 席珍强, 吴冬冬, 杨德仁

    Chin. J. Semicond.  2005, 26(8): 1549

    Abstract PDF


  • 沉积温度对a-SiNx∶H薄膜PL峰的影响

    刘渝珍, 陈大鹏, 王小波, 董立军

    Chin. J. Semicond.  2005, 26(8): 1553

    Abstract PDF


  • 量子阱GaAs太阳电池的质子辐射效应

    王荣, 杨靖波, 范强, 许颖, 孙旭芳

    Chin. J. Semicond.  2005, 26(8): 1558

    Abstract PDF


  • 硅纳米管的水热法合成与表征

    裴立宅, 唐元洪, 陈扬文, 郭池, 张勇

    Chin. J. Semicond.  2005, 26(8): 1562

    Abstract PDF


  • Ga掺杂ZnO薄膜的MOCVD生长及其特性

    朱顺明, 叶建东, 顾书林, 刘松民, 郑有炓, 张荣, 施毅

    Chin. J. Semicond.  2005, 26(8): 1567

    Abstract PDF

    利用低压MOCVD技术在(0002)蓝宝石上外延获得高质量的ZnO∶Ga单晶薄膜,并研究了Ga的不同掺杂浓度对材料电学和光学特性的影响.当Ga/Zn气相摩尔比为3.2 at%时,ZnO(0002)峰半高宽仅为0.26°,载流子浓度高达2.47e19cm-3,透射率高于90%;当载流子浓度升高时,吸收边出现明显的Burstein-Moss蓝移效应.同时室温光致发光谱显示,紫外峰位随载流子浓度的增加而发生红移,峰形展宽,这和Ga高掺杂所引起的能带重整化效应有关.当Ga/Zn比达到6.3 at%时,由于高掺杂浓度下Ga的自补偿效应导致载流子浓度下降.

  • YAG激光晶化多晶硅

    刘建平, 王海文, 李娟, 张德坤, 赵淑云, 吴春亚, 熊绍珍, 张丽珠

    Chin. J. Semicond.  2005, 26(8): 1572

    Abstract PDF


  • Si(111)衬底上生长的GaN的形貌与AlN缓冲层生长温度的关系

    朱军山, 徐岳生, 郭宝平, 刘彩池, 冯玉春, 胡加辉

    Chin. J. Semicond.  2005, 26(8): 1577

    Abstract PDF


  • 微晶硅太阳电池

    张晓丹, 高艳涛, 赵颖, 朱锋, 魏长春, 孙建, 耿新华, 熊绍珍

    Chin. J. Semicond.  2005, 26(8): 1582

    Abstract PDF


  • LS-DSP中串行分布式数字滤波器的功耗优化设计

    车德亮, 王忠, 沈绪榜

    Chin. J. Semicond.  2005, 26(8): 1586

    Abstract PDF


  • RF螺旋电感参数的提取方法

    王彦丰, 黄庆安, 廖小平

    Chin. J. Semicond.  2005, 26(8): 1591

    Abstract PDF


  • 基于SIMOX的耐高温压力传感器芯片制作

    王权, 丁建宁, 王文襄, 熊斌

    Chin. J. Semicond.  2005, 26(8): 1595

    Abstract PDF


  • 考虑微磁芯磁阻的分布参数微梁执行器小信号宏模型

    方玉明, 黄庆安, 李伟华

    Chin. J. Semicond.  2005, 26(8): 1599

    Abstract PDF


  • 1064nm RCE探测器光电响应特性分析

    彭红玲, 章昊, 韩勤, 杨晓红, 杜云, 倪海桥, 佟存柱, 牛智川, 郑厚植, 吴荣汉

    Chin. J. Semicond.  2005, 26(8): 1605

    Abstract PDF

    对1064nm谐振腔增强型(RCE)光电探测器(PD)的光电响应特性进行了分析研究.利用MBE生长技术得到有源区分别为量子阱和量子点的1064nm RCE探测器的外延片,并对制作的探测器进行了各种光电特性测试.结果表明量子阱结构的RCE探测器量子效率峰值达到57%,谱线半宽6~7nm,峰值波长1059nm;而量子点结构的RCE探测器量子效率峰值达到30%,谱线半宽5nm,峰值波长1056nm.通过分析量子效率和吸收系数之间的关系,对两种结构器件的吸收进行了比较,发现虽然量子点探测器的吸收小,但通过合理设计共振腔等方法也可以达到较高的量子效率.两种结构的器件都有很好的I-V特性.

  • AlGaN基PIN光电探测器的模型与模拟

    张春福, 郝跃, 张金凤, 龚欣

    Chin. J. Semicond.  2005, 26(8): 1610

    Abstract PDF

    在漂移扩散方程的基础上建立了AlGaN p-I-n光电探测器的物理模型,分析了多种结构AlGaN p-I-n光电探测器的光谱响应,并讨论了AlGaN/GaN异质结界面极化效应对太阳盲区p-GaN/I-Al0.33Ga0.67N/n-GaN倒置异质结结构p-I-n光电探测器(inverted heterostructure photodetectors,IHPs)UV/Solar选择比(280nm与320nm响应度之比)的影响.结果表明:优化p层是提高器件光谱响应的有效途径;为获得较高的UV/Solar选择比,光伏模式(零偏压)为太阳盲区p-GaN/I-Al0.33Ga0.67N/n-GaN IHPs的最佳工作模式;在光伏模式下考虑极化效应影响时,Ga面p-GaN/I-Al0.33Ga0.67N/n-GaN IHPs器件的UV/Solar选择比可达750,与Tarsa等人报道的三个量级的实验结果基本一致.

  • 10Gbit/s高T0无制冷分布反馈激光器

    赵玲娟, 朱洪亮, 张静媛, 周帆, 王宝军, 边静, 王鲁峰, 田慧良, 王圩

    Chin. J. Semicond.  2005, 26(8): 1616

    Abstract PDF


  • CMOS工艺中GG-NMOS结构ESD保护电路设计

    杜鸣, 郝跃, 朱志炜

    Chin. J. Semicond.  2005, 26(8): 1619

    Abstract PDF


  • ISO 14443单芯片读卡机解调电路的设计

    陈良生, 洪志良, 李联

    Chin. J. Semicond.  2005, 26(8): 1623

    Abstract PDF

    介绍了ISO 14443标准中IC卡到读卡机通信的信号特征和解调方法,提出了一种新颖的调幅波解调电路的基本原理和电路实现.芯片测试结果显示:电路在2.5~5.5V下都能稳定可靠的工作,工作温度范围为-20~80℃;5V条件下整个解调电路的功耗小于1mA;电路能检测的最小幅度调制信号为5mV.

  • 用于密码芯片抗功耗攻击的功耗平衡加法器

    李翔宇, 孙义和

    Chin. J. Semicond.  2005, 26(8): 1629

    Abstract PDF


  • 一种简化的光调制器驱动电路

    鄂辰熹, 刘训春, 王润梅, 袁志鹏

    Chin. J. Semicond.  2005, 26(8): 1635

    Abstract PDF


  • 适用于10/100Base-T以太网的低抖动频率综合器

    陆平, 王彦, 李联, 任俊彦

    Chin. J. Semicond.  2005, 26(8): 1640

    Abstract PDF

    计了一种用于10/100BaseT以太网收发器的频率综合器电路.该电路自适应工作在10和100Mbps两种模式下,并能自由切换.电路采用cascode电流源、差分对称负载延迟单元等优化结构,使时钟输出具有良好特性,且能兼具DLL功能,同时满足发送电路上升下降斜率控制和时钟恢复电路对于多相时钟的需要,避免额外的功耗和面积.在一定测试环境下,晶振的cycle-cycle抖动σ约为25ps,输出时钟分频后的25MHz测试时钟信号的σ仅为22ps.测试结果表明,时钟发生电路具有良好的工艺稳定性和较强的抑制噪声能力,满足发送和接收电路对于时钟性能的要求.芯片采用SMIC 0.35μm的标准CMOS工艺,电源电压为3.3V.

  • DES密码电路的抗差分功耗分析设计

    韩军, 曾晓洋, 汤庭鳌

    Chin. J. Semicond.  2005, 26(8): 1646

    Abstract PDF


  • 多晶硅加热法评价金属互连线电迁移寿命

    赵毅, 曹刚, 徐向明

    Chin. J. Semicond.  2005, 26(8): 1653

    Abstract PDF


  • 可缩放的开路通路地屏蔽电感在片测试结构去嵌入方法

    菅洪彦, 唐珏, 唐长文, 何捷, 闵昊

    Chin. J. Semicond.  2005, 26(8): 1656

    Abstract PDF


  • 快速确定微电子器件失效激活能及寿命试验的新方法

    李杰, 郭春生, 莫郁薇, 谢雪松, 程尧海, 李志国

    Chin. J. Semicond.  2005, 26(8): 1662

    Abstract PDF


  • 基于硫化物表面处理的InP/GaAs低温晶片键合

    黄辉, 王兴妍, 王琦, 陈斌, 黄永清, 任晓敏, 孙增辉, 钟源, 高俊华, 马骁宇, 陈弘达, 陈良惠

    Chin. J. Semicond.  2005, 26(8): 1667

    Abstract PDF


  • 基于元胞自动机理论的硅各向异性腐蚀模型

    陈杰智, 李泠, 施毅, 刘明, 郑有炓

    Chin. J. Semicond.  2005, 26(8): 1671

    Abstract PDF


  • 基于遗传算法的BSIM SOI模型参数提取

    李瑞贞, 韩郑生

    Chin. J. Semicond.  2005, 26(8): 1676

    Abstract PDF

    提出了一种提取BSIM SOI模型参数的新方法,该方法基于遗传算法和局部优化法的结合,同时具有全局优化和局部优化的优点,提取的参数物理意义明确,并且容易得到全局最优解.该方法计算简单,不需要对模型进行深入了解和丰富的参数提取经验,易于推广使用.对用该方法得到的SOI模型进行了模拟,并将模拟结果与1.2μm CMOS/SOI测试结果进行对比,二者吻合很好,SOI器件特有的kink效应也得到了很好的拟合.


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