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Volume 26, Issue 9, Sep 2005

    CONTENTS

  • Effect of Silicon-on-Insulator Substrate on Residual Strain in 3C-SiC Films

    Wang Xiaofeng, Huang Fengyi, Sun Guosheng, Wang Lei, Zhao Wanshun, Zeng Yiping, Li Haiou, and Duan Xiaofeng

    Chin. J. Semicond.  2005, 26(9): 1681

    Abstract PDF

    One group of SiC films are grown on silicon-on-insulator (SOI) substrates with a series of silicon-over-layer thickness.Raman scattering spectroscopy measurement clearly indicates that a systematic trend of residual stress reduction as the silicon over-layer thickness decreases for the SOI substrates.Strain relaxation in the SiC epilayer is explained by force balance approach and near coincidence lattice model.

  • Compressively Strained InGaAs/InGaAsP Quantum Well Distributed Feedback Laser at 1.74μm

    Pan Jiaoqing, Wang Wei, Zhu Hongliang, Zhao Qian, Wang Baojun, Zhou Fan, and Wang Lufeng

    Chin. J. Semicond.  2005, 26(9): 1688

    Abstract PDF

    The compressively strained InGaAs/InGaAsP quantum well distributed feedback laser with ridge-wave-guide is fabricated at 1.74μm.It is grown by low-pressure metal organic chemical vapor deposition(MOCVD).A strain buffer layer is used to avoid indium segregation.The threshold current of the device uncoated with length of 300μm is 115mA.The maximum output power is 14mW at 100mA.A side mode suppression ratio of 35.5dB is obtained.

  • High-Integrated-Photosensitivity Negative-Electron-Affinity GaAs Photocathodes with Multilayer Be-Doping Structures

    Wang Xiaofeng, Zeng Yiping, Wang Baoqiang, Zhu Zhanping, Du Xiaoqing, Li Min, and Chang Benkang

    Chin. J. Semicond.  2005, 26(9): 1692

    Abstract PDF

    The effect of changing Be doping concentration in GaAs layer on the integrated photosensitivity for negative-electron-affinity GaAs photocathodes is investigated.Two GaAs samples with the monolayer structure and the multilayer structure are grown by molecular beam epitaxy.The former has a constant Be concentration of 1e19cm-3,while the latter includes four layers with Be doping concentrations of 1e19,7e18,4e18,and 1e18cm-3 from the bottom to the surface.Negative-electron-affinity GaAs photocathodes are fabricated by exciting the sample surfaces with alternating input of Cs and O in the high vacuum system.The spectral response results measured by the on-line spectral response measurement system show that the integrated photosensitivity of the photocathode with the multilayer structure enhanced by at least 50% as compared to that of the monolayer structure.This attributes to the improvement in the crystal quality and the increase in the surface escape probability.Different stress situations are observed on GaAs samples with monolayer structure and multilayer structure,respectively.

  • A Into-Plane Rotating Micromirror Actuated by a Hybrid Electrostatic Driving Structure

    Wu Wengang, Chen Qinghua, Yin Dongqing, Yan Guizhen, Chen Zhangyuan, Hao Yilong, and Xu Anshi

    Chin. J. Semicond.  2005, 26(9): 1698

    Abstract PDF

    A novel into-plane rotating micromirror actuated by a hybrid electrostatic driving structure is presented.The hybrid driving structure is made up of a planar plate drive and a vertical comb drive.The device is fabricated in SOI substrate by using a bulk-and-surface mixed silicon micromachining process.As demonstrated by experiment,the novel driving structure can actuate the mirror to achieve large-range continuous rotation as well as spontaneous 90. rotation induced by the pull-in effect.The continuous rotating range of the micromirror is increased to about 46 degree at an increased yielding voltage.The measured yielding voltages of the mirrors with torsional springs of 1 and 0.5μm in thickness are 390~410V and 140~160V,respectively.The optical insertion loss has also been measured to be -1.98dB when the mirror serves as an optical switch.

  • Low Phase Noise Quadrature Oscillators Using New Injection Locked Technique

    Chi Baoyong, Zhu Xiaolei, Wang Ziqiang, and Wang Zhihua

    Chin. J. Semicond.  2005, 26(9): 1705

    Abstract PDF

    A low phase noise quadrature oscillator using the new injection locked technique is proposed.The incident signal is directly injected into the common-source connection of the sub-harmonic oscillator.In principle,the phase noise performance of the quadrature output is better than the sub-harmonic oscillator itself.The quadrature oscillator is implemented in a 0.25μm CMOS process.Measurements show the proposed oscillator could achieve a phase noise of -130dBc/Hz at 1MHz offset from 1.13GHz carrier while only drawing an 8.0mA current from the 2.5V power supply.

  • Design of Down Scalers in Mixed-Signal GHz Frequency Synthesizer

    Xu Yong, Wang Zhigong, Qiu Yinghua, Li Zhiqun, Hu Qingsheng, and Min Rui

    Chin. J. Semicond.  2005, 26(9): 1711

    Abstract PDF

    An optimized method is presented to design the down scalers in a GHz frequency synthesizer.The down scalers are comprised of dual modulus prescaler (DMP) and programmable & pulse swallow divider,different methods of high frequency analog circuit and digital logical synthesis are adopted respectively.Using a DMP high speed,lower jitter and lower power dissipation are obtained,and output frequency of 133.0MHz of the DMP working at divide-by-8 shows an RMS jitter less than 2ps.The flexibility and reusability of the programmable divider is high;its use could be extended to many complicated frequency synthesizers.By comparison,it is a better design on performance of high-frequency circuit and good design flexibility.

  • Performance Analysis of RF Spiral Inductor with Gradually Changed Metal Width and Space

    Wang Yong, Shi Yanling, Liu Yun, Ding Yanfang, Tang Shenqun, Zhu Jun, Chen Shoumian, and Zhao Yuhang

    Chin. J. Semicond.  2005, 26(9): 1716

    Abstract PDF

    To decrease the metal losses of RF spiral inductor,a novel layout structure with gradually reduced metal line width and space from outside to inside is presented.This gradual changed inductor has less eddy-current effect than the conventional inductor of fixed metal width and space.So the series resistance can be reduced and the quality (Q) factor of the inductor relating to metal losses is increased.The obtained experimental results corroborate the validity of the proposed method.For a 6nH inductor on high-resistivity silicon at 2.46GHz,Q factor of 14.25 is 11.3% higher than the conventional inductor with the same layout size.This inductor can be integrated with radio frequency integrated circuits to gain better performance in RF front end of a wireless communication system.

  • Fabrication and Simulation of Silicon-on-Insulator Structure with Si3N4 as a Buried Insulator

    Liu Qibin, Lin Qing, Liu Weili, Feng Songlin, and Song Zhitang

    Chin. J. Semicond.  2005, 26(9): 1722

    Abstract PDF

    In order to minimize the self-heating effect of the classic SOI devices,SOI structures with Si3N4 film as a buried insulator (SOSN) are successfully formed using epitaxial layer transfer technology for the first time.The new SOI structures are investigated with high-resolution cross-sectional transmission electron microscopy and spreading resistance profile.Experiment results show that the buried Si3N4 layer is amorphous and the new SOI material has good structural and electrical properties.The output current characteristics and temperature distribution are simulated and compared to those of standard SOI MOSFETs.Furthermore,the channel temperature and negative differential resistance are reduced during high-temperature operation,suggesting that SOSN can effectively mitigate the self-heating penalty.The new SOI device has been verified in two-dimensional device simulation and indicated that the new structures can reduce device self-heating and increase drain current of the SOI MOSFET.

  • Capacitive Microwave MEMS Switch

    Zhang Jinwen, Jin Yufeng, Hao Yilong, Wang Wei, Tian Dayu, and Wang Yangyuan

    Chin. J. Semicond.  2005, 26(9): 1727

    Abstract PDF

    A novel capacitive microwave MEMS switch with a silicon/metal/dielectric as a membrane is fabricated successfully by bonding and etching-stop process.Its principal,design,and fabricating process are described in detail.A patterned dielectric layer,Ta2O5,with dielectric constant of 24 is reached.Experiment results show this novel structure,where the switch’s dielectric layer is not prepared on the transmission line,features very low insertion loss.The insertion loss is 0.06dB at 2GHz and lower than 0.5dB in the wider range from DC up to 20GHz,especially when the transmission line metal is only 0.5μm thick.

  • A 2.4GHz CMOS Monolithic Transceiver Front-End for IEEE 802.11b Wireless LAN Applications

    Chi Baoyong, Shi Bingxue, and Wang Zhihua

    Chin. J. Semicond.  2005, 26(9): 1731

    Abstract PDF

    A 2.4GHz CMOS monolithic transceiver front-end for IEEE 802.11b wireless LAN applications is presented.The receiver and transmitter are both of superheterodyne structure for good system performance.The front-end consists of five blocks:low noise amplifier,down-converter,up-converter, pre-amplifier,and LO buffer.Their input/output impedance are all on-chip matched to 50Ω except the down-converter which has open-drain outputs.The transceiver RF front-end has been implemented in a 0.18μm CMOS process.When the LNA and the down-converter are directly connected,the measured noise figure is 5.2dB,the measured available power gain 12.5dB,the input 1dB compression point -18dBm,and the third-order input intercept point -7dBm.The receiver front-end draws 13.6mA currents from the 1.8V power supply.When the up-converter and pre-amplifier are directly connected,the measured noise figure is 12.4dB,the power gain is 23.8dB,the output 1dB compression point is 15dBm,and the third-order output intercept point is 16dBm.The transmitter consumes 276mA current from the 1.8V power supply.

  • 应变异质结构中超薄中间层的应变协调作用

    陈涌海, 杨少延, 王占国

    Chin. J. Semicond.  2005, 26(9): 1740

    Abstract PDF

    用一个简单模型讨论了应变异质结构中嵌入中间层对界面失配位错产生和应变释放的影响. 根据能量最小原理得到了弹性能最小状态下界面失配位错密度,发现当中间层材料的晶格常数比衬底和外延层的都大或者都小并且厚度足够薄时,超薄中间层可以完全吸收支撑衬底和外延层之间的应变而不产生任何界面失配位错,具有所谓无支撑衬底的应变协调作用.

  • 超晶格半导体材料的光磁电效应(I)

    罗诗裕, 邵明珠

    Chin. J. Semicond.  2005, 26(9): 1744

    Abstract PDF

    从Shockley-read统计出发,引入载流子寿命与浓度的相关性,描述了超晶格半导体载流子的输运特征,将载流子的输运方程化为二阶非线性方程,并用双参数摄动法找到了方程的一般解.在二阶近似下,计算了半导体材料的短路电流和光导电流,进一步揭示了大信号情况下光磁电效应的非线性特征.

  • 快速热退火对高应变InGaAs/Ga As量子阱的影响

    苗振华, 徐应强, 张石勇, 吴东海, 赵欢, 牛智川

    Chin. J. Semicond.  2005, 26(9): 1749

    Abstract PDF

    用固态分子束外延技术生长了高应变In0.45Ga0.55As/GaAs量子阱材料. 研究了快速热退火对高应变InGaAs/GaAs量子阱材料光学性质的影响. 本文采用假设InGaAs/GaAs量子阱中的In-Ga原子扩散为误差函数扩散并解任意形状量子阱的薛定谔方程的方法,对不同退火温度下InGaAs/GaAs量子阱室温光致发光峰值波长拟合,得到了In原子在高应变InGaAs/GaAs量子阱中的扩散系数以及扩散激活能(0.88eV) .

  • 原生直拉单晶硅中的铜沉淀规律席珍强

    席珍强, 杨德仁, 陈君, 阙端麟, H.J.Moeller

    Chin. J. Semicond.  2005, 26(9): 1753

    Abstract PDF

    采用红外扫描仪、扫描电镜以及电子束诱生电流仪研究了不同温度和不同冷却速度下原生直拉单晶硅的铜沉淀规律. 红外扫描仪观察发现:只有在热处理温度高于800℃的样品中才能观察到铜沉淀团,表明在原生单晶硅中铜沉淀温度为800℃. 同时,红外扫描仪和电子束诱生电流谱仪照片显示,快冷(30K/s)时,形成高密度的小铜沉淀团;而慢冷(0.3K/s)导致低密度、巨大的星形铜沉淀团的形成. 实验还发现慢冷所形成的星形铜沉淀团对少数载流子具有更强的复合强度. 最后,讨论了原生直拉单晶硅中铜沉淀规律的机理.

  • 碲锌镉晶片中位错与Te沉淀的透射电子显微分析

    曾冬梅, 王涛, 介万奇

    Chin. J. Semicond.  2005, 26(9): 1760

    Abstract PDF

    采用透射电子显微镜对碲锌镉晶体材料的缺陷特性进行了分析,观察并研究了碲锌镉晶体中Te沉淀相形貌和Te沉淀周围的棱柱位错环. 认为棱柱位错的形成是由Te沉淀相的析出引起的,而沉淀相在基体中的析出与基体形成错配应力,又造成位错的增殖. Te沉淀与棱柱位错两种缺陷是相互依存的.

  • 复合式热屏对Φ200mm CZSi单晶生长速率和氧含量的影响

    任丙彦, 赵龙, 傅洪波, 曹中谦, 张学强

    Chin. J. Semicond.  2005, 26(9): 1764

    Abstract PDF

    对Φ200mm太阳能CZSi单晶生长的传统热场进行了改进,施加了复合式热屏. 对改进前后热场温度梯度、单晶氧含量进行了实验分析,并对该系统的氩气流场进行了数值模拟. 研究了复合式热屏影响拉速和单晶氧含量的机理. 实验表明本文采用的复合式热屏和氩气流场可以提高拉速,降低硅单晶氧含量.

  • 导电流体在水平磁场中的粘度

    张雯, 刘彩池, 王海云

    Chin. J. Semicond.  2005, 26(9): 1768

    Abstract PDF

    采用回转振荡法,在向导电流体所在空间引入水平可调永磁磁场的条件下,测量研究了导电流体--液态汞(20℃)的粘度. 结果表明,液态汞的粘度随磁场强度的增大而增加,二者呈光滑的抛物线关系. 液态汞在磁场中粘度增加的现象与磁场导致的固态导电物质的磁粘滞效应现象相似,可以用磁场对带电运动粒子的作用简单直观地解释液态汞在磁场中粘度增加的机理. 这些研究成果为研究磁场直拉硅单晶生长提供了理论依据.

  • (111)晶向碲锌镉晶片双面腐蚀的对比

    刘从峰, 方维政, 涂步华, 孙士文, 杨建荣

    Chin. J. Semicond.  2005, 26(9): 1773

    Abstract PDF

    通过对材料减薄,并采用红外透射显微镜观察的手段,实现了对A面和B面腐蚀坑的同时观察.结果发现采用标准腐蚀剂在同一晶片的(111) A和(111) B面上形成的腐蚀坑大都不存在对应关系,深度腐蚀的实验也发现,表面腐蚀坑所对应的缺陷只局限于10μm的表层内,这表明大部分腐蚀坑所对应的不是通常认为的穿越位错. 进一步分析的结果表明,不同腐蚀剂形成的腐蚀坑所对应的缺陷有可能是不同类型的位错,甚至也可能起源于微沉淀物,通常将碲锌镉材料的腐蚀坑所对应的缺陷简单地归结为材料的位错是缺乏实验依据的.

  • 聚合物/有机小分子异质结掺杂型电致发光二极管及其发射机制

    聂海, 张波, 唐先忠, 李元勋

    Chin. J. Semicond.  2005, 26(9): 1778

    Abstract PDF

    为了提高有机电致发光器件的效率和稳定性,制作了聚合物/有机小分子异质结掺杂型电致发光二极管.它以新型PTPD(聚TPD)为空穴传输材料,高效荧光材料Rubrene为掺杂剂. 异质结基本结构为PTPD/Alq3,双层掺杂时,器件电致发光的量子效率大约是未掺杂器件的两倍;与未掺杂器件和常用的TPD/Alq3二极管相比,掺杂器件的稳定性有了显著的提高. 从电致发光光谱可知,掺杂器件的发射机制为载流子陷阱和Frster能量转换过程的共同作用.

  • 一种新型结构的InGaP/GaAs负阻异质结晶体管

    郭维廉, 齐海涛, 张世林, , , 梁惠来, 毛陆虹, 宋瑞良, 周均铭, 王文新, C.Jagadish, 傅岚

    Chin. J. Semicond.  2005, 26(9): 1783

    Abstract PDF

    利用硅双基区晶体管(DUBAT)产生负阻的原理,针对HBT器件结构和MBE材料结构的特点,设计并研制出一种基区刻断结构的负阻型HBT (NDRHBT) . 经过特性和参数测试,证明此种NDRHBT具有显著的微分负阻效应,并发现负电流区负阻效应和光照可改变其I-V特性,器件模拟结果和测试结果基本一致.

  • 跨导为325mS/mm的AlGaN/GaN HFET器件

    张志国, 杨瑞霞, , , , , 杨克武

    Chin. J. Semicond.  2005, 26(9): 1789

    Abstract PDF

    报道了使用国产GaN外延材料(蓝宝石衬底)的AlGaN/GaN HFET器件的制备以及室温下器件的性能. 器件栅采用场板结构,其中栅长为0.3μm,场板长为0.37μm,源漏间距为3μm. 器件的饱和电流密度为0.572A/mm,最大漏电流密度为0.921A/mm,最大跨导为325mS/mm,由S参数外推出截止频率和最高振荡频率分别为27.9GHz和33.1GHz.

  • 808nm InGaAsP单量子阱激光器激射波长的温度依赖性

    张永明, 钟景昌, 路国光, , , 赵英杰, 郝永芹, 姜晓光

    Chin. J. Semicond.  2005, 26(9): 1793

    Abstract PDF

    采用自行设计的热封闭系统对808nm InGaAsP单量子阱激光器激射波长的温度依赖性进行了实验研究. 用恒定电流下增益峰波长的温漂系数a1和恒定温度下增益峰波长随注入电流的漂移系数a2来表征激射波长的温度依赖性. 实验表明,激射波长的漂移系数dλ/dT是特征温度T0的函数. T0越高,激射波长的温度依赖性越大. 特征温度T0与透明电流Itr下的特征温度TItr相等时,激射波长的漂移系数dλ/dT达到最大值,该值由发热诱使带隙窄化dλg/dT决定. 解决高特征温度T0与小的dλ/dT矛盾的一种可能是考虑温度不依赖的漏电流.

  • 1×32硅基二氧化硅阵列波导光栅的研制

    龙文华, 李广波, 贾科淼, 屈红昌, 唐衍哲, 吴亚明, 杨建义, 王跃林

    Chin. J. Semicond.  2005, 26(9): 1798

    Abstract PDF

    采用高精度光刻版、PECVD材料生长、反应离子刻蚀和端面8. 角抛光等技术,设计并研制了1×32硅基二氧化硅阵列波导光栅. 研制的AWG芯片,其相邻通道引起的通道串扰小于-28dB,非相邻通道引入的串扰小于-35dB. 通道的插入损耗在进行光纤耦合封装后进一步提高,平均损耗约为4.9dB,不均匀性约为1.72dB.

  • C波段0.75mm AlGaN/GaN功率器件

    陈晓娟, 刘新宇, 和致经, , , 吴德馨

    Chin. J. Semicond.  2005, 26(9): 1804

    Abstract PDF

    研制并测试了以蓝宝石作衬底的10×75μm×0.8μm AlGaN/GaN微波器件,采用等离子增强气相化学沉积的方法生长了250nm的Si3N4形成钝化层,直流特性从0.56A/mm上升到0.66A/mm,跨导从158mS/mm增为170mS/mm,截止频率由10.7GHz增大到13.7GHz,同时在4GHz下,Vds=25V, Vgs=-2.5V,输出功率由0.90W增至1.79W,输出功率密度达到2.4W/mm. 钝化有效地改善了器件的输出特性,减小和消除了表面寄生栅对器件的影响.

  • 一种适用于开关电容电路的MOS开关栅增压电路

    张剑云, 李建, 郭亚炜, 沈泊, 张卫

    Chin. J. Semicond.  2005, 26(9): 1808

    Abstract PDF

    提出了一种新的MOS器件栅增压电路,它在减小MOS开关导通电阻的同时,减少了衬偏效应以及MOS开关输出信号的失真. 该电路采用了0.13μm 1.2V/2.5V CMOS工艺,HSPICE的仿真结果表明该栅增压电路适用于高速低电压开关电容电路.

  • 深亚微米pMOS器件的HCI和NBTI耦合效应与物理机制

    刘红侠, 郝跃

    Chin. J. Semicond.  2005, 26(9): 1813

    Abstract PDF

    研究了深亚微米pMOS器件的热载流子注入(hot-carrier injection,HCI)和负偏压温度不稳定效应(negative bias temperature instability,NBTI)的耦合效应和物理机制. 器件在室温下的损伤特性由HCI效应来控制. 高温条件下,器件受到HCI和NBTI效应的共同作用,二者的混合效应表现为NBTI不断增强的HCI效应. 在HCI条件下器件的阈值电压漂移依赖沟道长度,而NBTI效应中器件的阈值电压漂移与沟道长度无关,给出了分解HCI和NBTI耦合效应的方法.

  • 埋空隙PSOI结构的耐压分析

    段宝兴, 张波, 李肇基, 罗小蓉

    Chin. J. Semicond.  2005, 26(9): 1818

    Abstract PDF

    提出了一种埋空隙PSOI (APSOI) RESURF器件结构,此结构利用空隙相对低的介电系数,在器件纵向突破了传统SiO2埋层的耐压关系,提高了击穿电压;硅窗口的存在缓解了有源区的自热效应;不同衬底的场调制作用进一步优化了表面电场分布. 在相同击穿电压条件下,此结构较一般PSOI结构只需1/4厚度的埋层,当漂移区厚度和埋层厚度均为2μm时可获得600V以上的击穿电压.

  • LDMOS的局部电热效应分析

    李梅芝, 韦光萍, 陈星弼

    Chin. J. Semicond.  2005, 26(9): 1823

    Abstract PDF

    分析了LDMOS (lateral DMOS)在一次雪崩击穿后的局部电热效应. 提出并证明了等温分析和电热分析分别得到的LDMOS的触发点是不同的;分析了局部晶格温度在空间上的分布特点;并提出晶格温度弛豫时间会影响漏极电压弛豫时间.从而证明LDMOS工作于ESD (electro-static discharge)保护的大电流区时,电热分析比等温分析的模拟结果与实验结果符合得更好.

  • 一种抗辐照SOI反相器

    赵洪辰, 海潮和, 韩郑生, 钱鹤, 司红

    Chin. J. Semicond.  2005, 26(9): 1829

    Abstract PDF

    制备了一种抗辐照SOI反相器,增加了一个上拉pMOS1和一个额外的nMOS1. 当受到辐照后,pMOS1和nMOS1输出的高电平使下级输出管的源漏电压减小,降低了漏电流,有效地提高了输出端“高”电平. 实验证明,该反相器在经受6e5rad(Si)的辐照后,输出“高”电平仍然未下降.

  • 逆导型GCT阻断特性的分析与设计

    王彩琳, , , 张昌利

    Chin. J. Semicond.  2005, 26(9): 1833

    Abstract PDF

    在分析pnp隔离的逆导型GCT (RC-GCT)特性的基础上,提出了沟槽隔离的RC-GCT新结构,并给出了其阻断特性的设计方法. 依此建立了RC-GCT的结构模型,利用MEDICI软件对其阻断特性进行了模拟,并与非对称GCT和pnp隔离的RC-GCT的阻断特性进行了比较和分析. 另外,通过对不同沟槽结构参数下RC-GCT的阻断特性和门极击穿特性的模拟,给出了沟槽区的优化参数. 实验结果证明了设计的合理性.

  • 一种用于流水线模数转换器的电容失配校准方法

    李福乐, 王红梅, 李冬梅, 王志华

    Chin. J. Semicond.  2005, 26(9): 1838

    Abstract PDF

    对于流水线模数转换器(ADC),电容失配是一种主要的非线性误差源. 为了减小电容失配误差,提出了一种电容失配校准的方法. 该方法通过一种电荷相加、电容交换和电荷反转移的电路技术,可将电容失配误差减小至其2次项. 基于所提出的方法,设计了一种0.6μm CMOS,13b, 2MS/s的流水线ADC实验芯片. 对所设计的实验芯片进行测试,得到了0.5LSB的DNL和2.5LSB的INL,并且当以614kHz的采样率对19.2kHz的输入进行转换时,得到了71.2dB的SFDR和64.1dB的SNDR,当以2MHz的采样率对125kHz的输入进行转换时,得到了70.6dB的SFDR和62.22dB的SNDR. 以上结果表明,ADC得到了超出电容匹配精度的线性度,证明了所采用的电容失配校准方法的有效性.

  • ISO 14443单芯片读卡机放大、滤波和量化电路的设计

    陈良生, 洪志良, 李联

    Chin. J. Semicond.  2005, 26(9): 1843

    Abstract PDF

    介绍了ISO 14443解调电路解调后滤波、放大和量化电路的设计,提出了一种新的阈值电压可变的比较器结构. 电路经0.6μm工艺生产线流片验证,测试结果显示:电路可在2.5~5.5V电压范围内工作,工作温度为-20~80℃,载波信号衰减大于40dB,电路增益在26~44dB范围内可调,5V条件下,电路的功耗小于10mA.

  • 一种DC-DC芯片内建可测性设计

    王红义, 来新泉, 李玉山, 陈富吉

    Chin. J. Semicond.  2005, 26(9): 1848

    Abstract PDF

    DC-DC芯片设计中有许多内部参数需要检测和控制,有限的引脚数目使得直接测试内部参数比较困难. 文中提出一种通用性很强的内建可测性设计方法,在芯片内部设计时只需要增加规模较小的测试电路,就可以在芯片外引脚上测量芯片内部众多的参数.

  • 一种低延迟低功耗的片上全局互连方法

    刘祥远, 陈书明

    Chin. J. Semicond.  2005, 26(9): 1854

    Abstract PDF

    提出了一种用于片上全局互连的混合插入方法. 该方法利用中继驱动器和低摆幅差分信号电路在驱动不同长度连线时的优点,将它们混合插入到连线的合适位置,从而降低互连的延时和功耗. 模拟结果表明,该方法与已有方法相比在延时、能耗、能耗延时积以及面积等方面都获得了一定程度的改善.

  • Material Growth and Device Fabrication of GaAs Based 1.3μm GaInNAs Quantum Well Laser Diodes

    Niu Zhichuan, Han Qin, Ni Haiqiao, Yang Xiaohong, Xu Yingqiang, Du Yun, Zhang Shiyong, Peng Hongling, Zhao Huan, Wu Donghai, Li Sh

    Chin. J. Semicond.  2005, 26(9): 1860

    Abstract PDF

    Material growth and device fabrication of the first 1.3μm quantum well (QW) edge emitting laser diodes in China are reported.Through the optimization of the molecular beam epitaxy (MBE) growth conditions and the tuning of the indium and nitrogen composition of the GaInNAs QWs,the emission wavelengths of the QWs can be tuned to 1.3μm.Ridge geometry waveguide laser diodes are fabricated.The lasing wavelength is 1.3μm under continuous current injection at room temperature with threshold current of 1kA/cm2 for the laser diode structures with the cleaved facet mirrors.The output light power over 30mW is obtained.

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