Since the invention of amorphous indium–gallium–zinc–oxide (IGZO) based thin-film transistors (TFTs) by Hideo Hosono in 2004, investigations on the topic of IGZO TFTs have been rapidly expanded thanks to their high electrical performance, large-area uniformity, and low processing temperature. This article reviews the recent progress and major trends in the field of IGZO-based TFTs. After a brief introduction of the history of IGZO and the main advantages of IGZO-based TFTs, an overview of IGZO materials and IGZO-based TFTs is given. In this part, IGZO material electron travelling orbitals and deposition methods are introduced, and the specific device structures and electrical performance are also presented. Afterwards, the recent advances of IGZO-based TFT applications are summarized, including flat panel display drivers, novel sensors, and emerging neuromorphic systems. In particular, the realization of flexible electronic systems is discussed. The last part of this review consists of the conclusions and gives an outlook over the field with a prediction for the future.
J. Semicond.Ying Zhu, Yongli He, Shanshan Jiang, Li Zhu, Chunsheng Chen, Qing Wan. Indium–gallium–zinc–oxide thin-film transistors: Materials, devices, and applications[J]. Journal of Semiconductors, 2021, 42(3): 031101. doi: 10.1088/1674-4926/42/3/031101.
Y Zhu, Y L He, S S Jiang, L Zhu, C S Chen, Q Wan, Indium–gallium–zinc–oxide thin-film transistors: Materials, devices, and applications[J]. J. Semicond., 2021, 42(3): 031101. doi: 10.1088/1674-4926/42/3/031101.Export: BibTex EndNote
J. Semicond.Rokas Kondrotas, Chao Chen, XinXing Liu, Bo Yang, Jiang Tang. Low-dimensional materials for photovoltaic application[J]. Journal of Semiconductors, 2021, 42(3): 031701. doi: 10.1088/1674-4926/42/3/031701.
R Kondrotas, C Chen, X X Liu, B Yang, J Tang, Low-dimensional materials for photovoltaic application[J]. J. Semicond., 2021, 42(3): 031701. doi: 10.1088/1674-4926/42/3/031701.Export: BibTex EndNote
The photovoltaic (PV) market is currently dominated by silicon based solar cells. However technological diversification is essential to promote competition, which is the driving force for technological growth. Historically, the choice of PV materials has been limited to the three-dimensional (3D) compounds with a high crystal symmetry and direct band gap. However, to meet the strict demands for sustainable PV applications, material space has been expanded beyond 3D compounds. In this perspective we discuss the potential of low-dimensional materials (2D, 1D) for application in PVs. We present unique features of low-dimensional materials in context of their suitability in the solar cells. The band gap, absorption, carrier dynamics, mobility, defects, surface states and growth kinetics are discussed and compared to 3D counterparts, providing a comprehensive view of prospects of low-dimensional materials. Structural dimensionality leads to a highly anisotropic carrier transport, complex defect chemistry and peculiar growth dynamics. By providing fundamental insights into these challenges we aim to deepen the understanding of low-dimensional materials and expand the scope of their application. Finally, we discuss the current research status and development trend of solar cell devices made of low-dimensional materials.
J. Semicond. 2021, 42 (2): 023101Ran Cheng, Zhuo Chen, Sicong Yuan, Mitsuru Takenaka, Shinichi Takagi, Genquan Han, Rui Zhang. Mobility enhancement techniques for Ge and GeSn MOSFETs[J]. Journal of Semiconductors, 2021, 42(2): 023101. doi: 10.1088/1674-4926/42/2/023101.
R Cheng, Z Chen, S C Yuan, M Takenaka, S Takagi, G Q Han, R Zhang, Mobility enhancement techniques for Ge and GeSn MOSFETs[J]. J. Semicond., 2021, 42(2): 023101. doi: 10.1088/1674-4926/42/2/023101.Export: BibTex EndNote
The performance enhancement of conventional Si MOSFETs through device scaling is becoming increasingly difficult. The application of high mobility channel materials is one of the most promising solutions to overcome the bottleneck. The Ge and GeSn channels attract a lot of interest as the alternative channel materials, not only because of the high carrier mobility but also the superior compatibility with typical Si CMOS technology. In this paper, the recent progress of high mobility Ge and GeSn MOSFETs has been investigated, providing feasible approaches to improve the performance of Ge and GeSn devices for future CMOS technologies.
The past and future of multi-gate field-effect transistors: Process challenges and reliability issues
J. Semicond. 2021, 42 (2): 023102Ying Sun, Xiao Yu, Rui Zhang, Bing Chen, Ran Cheng. The past and future of multi-gate field-effect transistors: Process challenges and reliability issues[J]. Journal of Semiconductors, 2021, 42(2): 023102. doi: 10.1088/1674-4926/42/2/023102.
Y Sun, X Yu, R Zhang, B Chen, R Cheng, The past and future of multi-gate field-effect transistors: Process challenges and reliability issues[J]. J. Semicond., 2021, 42(2): 023102. doi: 10.1088/1674-4926/42/2/023102.Export: BibTex EndNote
This work reviews the state-of-the art multi-gate field-effect transistor (MuGFET) process technologies and compares the device performance and reliability characteristics of the MuGFETs with the planar Si CMOS devices. Owing to the 3D wrapped gate structure, MuGFETs can suppress the SCEs and improve the ON-current performance due to the volume inversion of the channel region. As the Si CMOS technology pioneers to sub-10 nm nodes, the process challenges in terms of lithography capability, process integration controversies, performance variability etc. were also discussed in this work. Due to the severe self-heating effect in the MuGFETs, the ballistic transport and reliability characteristics were investigated. Future alternatives for the current Si MuGFET technology were discussed at the end of the paper. More work needs to be done to realize novel high mobility channel MuGFETs with better performance and reliability.
J. Semicond. 2021, 42 (2): 023103Daquan Yang, Xiao Liu, Xiaogang Li, Bing Duan, Aiqiang Wang, Yunfeng Xiao. Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics[J]. Journal of Semiconductors, 2021, 42(2): 023103. doi: 10.1088/1674-4926/42/2/023103.
D Q Yang, X Liu, X G Li, B Duan, A Q Wang, Y F Xiao, Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics[J]. J. Semicond., 2021, 42(2): 023103. doi: 10.1088/1674-4926/42/2/023103.Export: BibTex EndNote
Integrated circuit (IC) industry has fully considered the fact that the Moore’s Law is slowing down or ending. Alternative solutions are highly and urgently desired to break the physical size limits in the More-than-Moore era. Integrated silicon photonics technology exhibits distinguished potential to achieve faster operation speed, less power dissipation, and lower cost in IC industry, because their COMS compatibility, fast response, and high monolithic integration capability. Particularly, compared with other on-chip resonators (e.g. microrings, 2D photonic crystal cavities) silicon-on-insulator (SOI)-based photonic crystal nanobeam cavity (PCNC) has emerged as a promising platform for on-chip integration, due to their attractive properties of ultra-high Q/V, ultra-compact footprints and convenient integration with silicon bus-waveguides. In this paper, we present a comprehensive review on recent progress of on-chip PCNC devices for lasing, modulation, switching/filting and label-free sensing, etc.
J. Semicond. 2021, 42 (2): 023104Min Tan, Kaixuan Ye, Da Ming, Yuhang Wang, Zhicheng Wang, Li Jin, Junbo Feng. Towards electronic-photonic-converged thermo-optic feedback tuning[J]. Journal of Semiconductors, 2021, 42(2): 023104. doi: 10.1088/1674-4926/42/2/023104.
M Tan, K X Ye, D Ming, Y H Wang, Z C Wang, L Jin, J B Feng, Towards electronic-photonic-converged thermo-optic feedback tuning[J]. J. Semicond., 2021, 42(2): 023104. doi: 10.1088/1674-4926/42/2/023104.Export: BibTex EndNote
As Moore’s law approaching its end, electronics is hitting its power, bandwidth, and capacity limits. Photonics is able to overcome the performance limits of electronics but lacks practical photonic register and flexible control. Combining electronics and photonics provides the best of both worlds and is widely regarded as an important post-Moore’s direction. For stability and dynamic operations considerations, feedback tuning of photonic devices is required. For silicon photonics, the thermo-optic effect is the most frequently used tuning mechanism due to the advantages of high efficiency and low loss. However, it brings new design requirements, creating new design challenges. Emerging applications, such as optical phased array, optical switches, and optical neural networks, employ a large number of photonic devices, making PCB tuning solutions no longer suitable. Electronic-photonic-converged solutions with compact footprints will play an important role in system scalability. In this paper, we present a unified model for thermo-optic feedback tuning that can be specialized to different applications, review its recent advances, and discuss its future trends.
Shuiying Xiang, Yanan Han, Ziwei Song, Xingxing Guo, Yahui Zhang, Zhenxing Ren, Suhong Wang, Yuanting Ma, Weiwen Zou, Bowen Ma, Shaofu Xu, Jianji Dong, Hailong Zhou, Quansheng Ren, Tao Deng, Yan Liu, Genquan Han, Yue Hao
J. Semicond. 2021, 42 (2): 023105Shuiying Xiang, Yanan Han, Ziwei Song, Xingxing Guo, Yahui Zhang, Zhenxing Ren, Suhong Wang, Yuanting Ma, Weiwen Zou, Bowen Ma, Shaofu Xu, Jianji Dong, Hailong Zhou, Quansheng Ren, Tao Deng, Yan Liu, Genquan Han, Yue Hao. A review: Photonics devices, architectures, and algorithms for optical neural computing[J]. Journal of Semiconductors, 2021, 42(2): 023105. doi: 10.1088/1674-4926/42/2/023105.
S Y Xiang, Y N Han, Z W Song, X X Guo, Y H Zhang, Z X Ren, S H Wang, Y T Ma, W W Zou, B W Ma, S F Xu, J J Dong, H L Zhou, Q S Ren, T Deng, Y Liu, G Q Han, Y Hao, A review: Photonics devices, architectures, and algorithms for optical neural computing[J]. J. Semicond., 2021, 42(2): 023105. doi: 10.1088/1674-4926/42/2/023105.Export: BibTex EndNote
The explosive growth of data and information has motivated various emerging non-von Neumann computational approaches in the More-than-Moore era. Photonics neuromorphic computing has attracted lots of attention due to the fascinating advantages such as high speed, wide bandwidth, and massive parallelism. Here, we offer a review on the optical neural computing in our research groups at the device and system levels. The photonics neuron and photonics synapse plasticity are presented. In addition, we introduce several optical neural computing architectures and algorithms including photonic spiking neural network, photonic convolutional neural network, photonic matrix computation, photonic reservoir computing, and photonic reinforcement learning. Finally, we summarize the major challenges faced by photonic neuromorphic computing, and propose promising solutions and perspectives.
A review of silicon-based wafer bonding processes, an approach to realize the monolithic integration of Si-CMOS and III–V-on-Si wafers
J. Semicond. 2021, 42 (2): 023106Shuyu Bao, Yue Wang, Khaw Lina, Li Zhang, Bing Wang, Wardhana Aji Sasangka, Kenneth Eng Kian Lee, Soo Jin Chua, Jurgen Michel, Eugene Fitzgerald, Chuan Seng Tan, Kwang Hong Lee. A review of silicon-based wafer bonding processes, an approach to realize the monolithic integration of Si-CMOS and III–V-on-Si wafers[J]. Journal of Semiconductors, 2021, 42(2): 023106. doi: 10.1088/1674-4926/42/2/023106.
S Y Bao, Y Wang, K Lina, L Zhang, B Wang, W A Sasangka, K E K Lee, S J Chua, J Michel, E Fitzgerald, C S Tan, K H Lee, A review of silicon-based wafer bonding processes, an approach to realize the monolithic integration of Si-CMOS and III–V-on-Si wafers[J]. J. Semicond., 2021, 42(2): 023106. doi: 10.1088/1674-4926/42/2/023106.Export: BibTex EndNote
The heterogeneous integration of III–V devices with Si-CMOS on a common Si platform has shown great promise in the new generations of electrical and optical systems for novel applications, such as HEMT or LED with integrated control circuitry. For heterogeneous integration, direct wafer bonding (DWB) techniques can overcome the materials and thermal mismatch issues by directly bonding dissimilar materials systems and device structures together. In addition, DWB can perform at wafer-level, which eases the requirements for integration alignment and increases the scalability for volume production. In this paper, a brief review of the different bonding technologies is discussed. After that, three main DWB techniques of single-, double- and multi-bonding are presented with the demonstrations of various heterogeneous integration applications. Meanwhile, the integration challenges, such as micro-defects, surface roughness and bonding yield are discussed in detail.
J. Semicond. 2021, 42 (1): 013101Andrey S. Sokolov, Haider Abbas, Yawar Abbas, Changhwan Choi. Towards engineering in memristors for emerging memory and neuromorphic computing: A review[J]. Journal of Semiconductors, 2021, 42(1): 013101. doi: 10.1088/1674-4926/42/1/013101.
A S Sokolov, H Abbas, Y Abbas, C Choi, Towards engineering in memristors for emerging memory and neuromorphic computing: A review[J]. J. Semicond., 2021, 42(1): 013101. doi: 10.1088/1674-4926/42/1/013101.Export: BibTex EndNote
Resistive random-access memory (RRAM), also known as memristors, having a very simple device structure with two terminals, fulfill almost all of the fundamental requirements of volatile memory, nonvolatile memory, and neuromorphic characteristics. Its memory and neuromorphic behaviors are currently being explored in relation to a range of materials, such as biological materials, perovskites, 2D materials, and transition metal oxides. In this review, we discuss the different electrical behaviors exhibited by RRAM devices based on these materials by briefly explaining their corresponding switching mechanisms. We then discuss emergent memory technologies using memristors, together with its potential neuromorphic applications, by elucidating the different material engineering techniques used during device fabrication to improve the memory and neuromorphic performance of devices, in areas such as ION/IOFF ratio, endurance, spike time-dependent plasticity (STDP), and paired-pulse facilitation (PPF), among others. The emulation of essential biological synaptic functions realized in various switching materials, including inorganic metal oxides and new organic materials, as well as diverse device structures such as single-layer and multilayer hetero-structured devices, and crossbar arrays, is analyzed in detail. Finally, we discuss current challenges and future prospects for the development of inorganic and new materials-based memristors.
A revew of in situ transmission electron microscopy study on the switching mechanism and packaging reliability in non-volatile memory
J. Semicond. 2021, 42 (1): 013102Xin Yang, Chen Luo, Xiyue Tian, Fang Liang, Yin Xia, Xinqian Chen, Chaolun Wang, Steve Xin Liang, Xing Wu, Junhao Chu. A revew of in situ transmission electron microscopy study on the switching mechanism and packaging reliability in non-volatile memory[J]. Journal of Semiconductors, 2021, 42(1): 013102. doi: 10.1088/1674-4926/42/1/013102.
X Yang, C Luo, X Y Tian, F Liang, Y Xia, X Q Chen, C L Wang, S X Liang, X Wu, J H Chu, A revew of in situ transmission electron microscopy study on the switching mechanism and packaging reliability in non-volatile memory[J]. J. Semicond., 2021, 42(1): 013102. doi: 10.1088/1674-4926/42/1/013102.Export: BibTex EndNote
Non-volatile memory (NVM) devices with non-volatility and low power consumption properties are important in the data storage field. The switching mechanism and packaging reliability issues in NVMs are of great research interest. The switching process in NVM devices accompanied by the evolution of microstructure and composition is fast and subtle. Transmission electron microscopy (TEM) with high spatial resolution and versatile external fields is widely used in analyzing the evolution of morphology, structures and chemical compositions at atomic scale. The various external stimuli, such as thermal, electrical, mechanical, optical and magnetic fields, provide a platform to probe and engineer NVM devices inside TEM in real-time. Such advanced technologies make it possible for an in situ and interactive manipulation of NVM devices without sacrificing the resolution. This technology facilitates the exploration of the intrinsic structure-switching mechanism of NVMs and the reliability issues in the memory package. In this review, the evolution of the functional layers in NVM devices characterized by the advanced in situ TEM technology is introduced, with intermetallic compounds forming and degradation process investigated. The principles and challenges of TEM technology on NVM device study are also discussed.
- INVITED REVIEW PAPERS
- SEMICONDUCTOR PHYSICS
- SEMICONDUCTOR MATERIALS
- SEMICONDUCTOR DEVICES
- SEMICONDUCTOR INTEGRATED CIRCUITS
- SEMICONDUCTOR TECHNOLOGY