Review Articles
  • III–V ternary nanowires on Si substrates: growth, characterization and device applications

    Giorgos Boras, Xuezhe Yu, Huiyun Liu

    J. Semicond.  2019, 40 (10): 101301

    doi: 10.1088/1674-4926/40/10/101301

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    Over the past decades, the progress in the growth of materials which can be applied to cutting-edge technologies in the field of electronics, optoelectronics and energy harvesting has been remarkable. Among the various materials, group III–V semiconductors are of particular interest and have been widely investigated due to their excellent optical properties and high carrier mobility. However, the integration of III–V structures as light sources and numerous other optical components on Si, which is the foundation for most optoelectronic and electronic integrated circuits, has been hindered by the large lattice mismatch between these compounds. This mismatch results in substantial amounts of strain and degradation of the performance of the devices. Nanowires (NWs) are unique nanostructures that induce elastic strain relaxation, allowing for the monolithic integration of III–V semiconductors on the cheap and mature Si platform. A technique that ensures flexibility and freedom in the design of NW structures is the growth of ternary III–V NWs, which offer a tuneable frame of optical characteristics, merely by adjusting their nominal composition. In this review, we will focus on the recent progress in the growth of ternary III–V NWs on Si substrates. After analysing the growth mechanisms that are being employed and describing the effect of strain in the NW growth, we will thoroughly inspect the available literature and present the growth methods, characterization and optical measurements of each of the III–V ternary alloys that have been demonstrated. The different properties and special treatments required for each of these material platforms are also discussed. Moreover, we will present the results from the works on device fabrication, including lasers, solar cells, water splitting devices, photodetectors and FETs, where ternary III–V NWs were used as building blocks. Through the current paper, we exhibit the up-to-date state in this field of research and summarize the important accomplishments of the past few years.

  • Recent progress in epitaxial growth of III–V quantum-dot lasers on silicon substrate

    Shujie Pan, Victoria Cao, Mengya Liao, Ying Lu, Zizhuo Liu, Mingchu Tang, Siming Chen, Alwyn Seeds, Huiyun Liu

    J. Semicond.  2019, 40 (10): 101302

    doi: 10.1088/1674-4926/40/10/101302

    Abstract Full Text PDF Get Citation

    In the past few decades, numerous high-performance silicon (Si) photonic devices have been demonstrated. Si, as a photonic platform, has received renewed interest in recent years. Efficient Si-based III–V quantum-dot (QDs) lasers have long been a goal for semiconductor scientists because of the incomparable optical properties of III–V compounds. Although the material dissimilarity between III–V material and Si hindered the development of monolithic integrations for over 30 years, considerable breakthroughs happened in the 2000s. In this paper, we review recent progress in the epitaxial growth of various III–V QD lasers on both offcut Si substrate and on-axis Si (001) substrate. In addition, the fundamental challenges in monolithic growth will be explained together with the superior characteristics of QDs.

  • Perspective: optically-pumped III–V quantum dot microcavity lasers via CMOS compatible patterned Si (001) substrates

    Wenqi Wei, Qi Feng, Zihao Wang, Ting Wang, Jianjun Zhang

    J. Semicond.  2019, 40 (10): 101303

    doi: 10.1088/1674-4926/40/10/101303

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    Direct epitaxial growth III–V quantum dot (QD) structures on CMOS-compatible silicon substrates is considered as one of the most promising approaches to achieve low-cost and high-yield Si-based lasers for silicon photonic integration. However, epitaxial growth of III–V materials on Si encounters the following three major challenges: high density of threading dislocations, antiphase boundaries and thermal cracks, which significantly degrade the crystal quality and potential device performance. In this review, we will focus on some recent results related to InAs/GaAs quantum dot lasers on Si (001) substrates by III–V/IV hybrid epitaxial growth via (111)-faceted Si hollow structures. Moreover, by using the step-graded epitaxial growth process the emission wavelength of InAs QDs can be extended from O-band to C/L-band. High-performance InAs/GaAs QD micro-disk lasers with sub-milliwatts threshold on Si (001) substrates are fabricated and characterized. The above results pave a promising path towards the on-chip lasers for optical interconnect applications.

  • Recent advances of heterogeneously integrated III–V laser on Si

    Xuhan Guo, An He, Yikai Su

    J. Semicond.  2019, 40 (10): 101304

    doi: 10.1088/1674-4926/40/10/101304

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    Due to the indirect bandgap nature, the widely used silicon CMOS is very inefficient at light emitting. The integration of silicon lasers is deemed as the ‘Mount Everest’ for the full take-up of Si photonics. The major challenge has been the materials dissimilarity caused impaired device performance. We present a brief overview of the recent advances of integrated III–V laser on Si. We will then focus on the heterogeneous direct/adhesive bonding enabling methods and associated light coupling structures. A selected review of recent representative novel heterogeneously integrated Si lasers for emerging applications like spectroscopy, sensing, metrology and microwave photonics will be presented, including DFB laser array, ultra-dense comb lasers and nanolasers. Finally, the challenges and opportunities of heterogeneous integration approach are discussed.

  • III–V compound materials and lasers on silicon

    Wenyu Yang, Yajie Li, Fangyuan Meng, Hongyan Yu, Mengqi Wang, Pengfei Wang, Guangzhen Luo, Xuliang Zhou, Jiaoqing Pan

    J. Semicond.  2019, 40 (10): 101305

    doi: 10.1088/1674-4926/40/10/101305

    Abstract Full Text PDF Get Citation

    Silicon-based photonic integration has attracted the interest of semiconductor scientists because it has high luminous efficiency and electron mobility. Breakthroughs have been made in silicon-based integrated lasers over the past few decades. Here we review three main methods of integration of III–V materials on Si, namely direct growth, bonding, and selective-area hetero-epitaxy. The III–V materials we introduced mainly include materials such as GaAs and InP. The lasers are mainly lasers of related communication bands. We also introduced the advantages and challenges of the three methods.

  • Dynamics of InAs/GaAs quantum dot lasers epitaxially grown on Ge or Si substrate

    Cheng Wang, Yueguang Zhou

    J. Semicond.  2019, 40 (10): 101306

    doi: 10.1088/1674-4926/40/10/101306

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    Growing semiconductor laser sources on silicon is a crucial but challenging technology for developing photonic integrated circuits (PICs). InAs/GaAs quantum dot (Qdot) lasers have successfully circumvented the mismatch problem between III–V materials and Ge or Si, and have demonstrated efficient laser emission. In this paper, we review dynamical characteristics of Qdot lasers epitaxially grown on Ge or Si, in comparison with those of Qdot lasers on native GaAs substrate. We discuss properties of linewidth broadening factor, laser noise and its sensitivity to optical feedback, intensity modulation, as well as mode locking operation. The investigation of these dynamical characteristics is beneficial for guiding the design of PICs in optical communications and optical computations.

  • Hydride vapor phase epitaxy for gallium nitride substrate

    Jun Hu, Hongyuan Wei, Shaoyan Yang, Chengming Li, Huijie Li, Xianglin Liu, Lianshan Wang, Zhanguo Wang

    J. Semicond.  2019, 40 (10): 101801

    doi: 10.1088/1674-4926/40/10/101801

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    Due to the remarkable growth rate compared to another growth methods for gallium nitride (GaN) growth, hydride vapor phase epitaxy (HVPE) is now the only method for mass product GaN substrates. In this review, commercial HVPE systems and the GaN crystals grown by them are demonstrated. This article also illustrates some innovative attempts to develop homebuilt HVPE systems. Finally, the prospects for the further development of HVPE for GaN crystal growth in the future are also discussed.

  • Lattice vibration and Raman scattering of two-dimensional van der Waals heterostructure

    Xin Cong, Miaoling Lin, Ping-Heng Tan

    J. Semicond.  2019, 40 (9): 091001

    doi: 10.1088/1674-4926/40/9/091001

    Abstract Full Text PDF Get Citation

    Research on two-dimensional (2D) materials and related van der Waals heterostructures (vdWHs) is intense and remains one of the leading topics in condensed matter physics. Lattice vibrations or phonons of a vdWH provide rich information, such as lattice structure, phonon dispersion, electronic band structure and electron–phonon coupling. Here, we provide a mini review on the lattice vibrations in vdWHs probed by Raman spectroscopy. First, we introduced different kinds of vdWHs, including their structures, properties and potential applications. Second, we discussed interlayer and intralayer phonon in twist multilayer graphene and MoS2. The frequencies of interlayer and intralayer modes can be reproduced by linear chain model (LCM) and phonon folding induced by periodical moiré potentials, respectively. Then, we extended LCM to vdWHs formed by distinct 2D materials, such as MoS2/graphene and hBN/WS2 heterostructures. We further demonstrated how to calculate Raman intensity of interlayer modes in vdWHs by interlayer polarizability model.

  • Reducing the power consumption of two-dimensional logic transistors

    Weisheng Li, Hongkai Ning, Zhihao Yu, Yi Shi, Xinran Wang

    J. Semicond.  2019, 40 (9): 091002

    doi: 10.1088/1674-4926/40/9/091002

    Abstract Full Text PDF Get Citation

    The growing demand for high-performance logic transistors has driven the exponential rise in chip integration, while the transistors have been rapidly scaling down to sub-10 nm. The increasing leakage current and subthreshold slope (SS) induced by short channel effect (SCE) result in extra heat dissipation during device operation. The performance of electronic devices based on two-dimensional (2D) semiconductors such as the transition metal dichalcogenides (TMDC) can significantly reduce power consumption, benefiting from atomically thin thickness. Here, we discuss the progress of dielectric integration of 2D metal–oxide–semiconductor field effect transistors (MOSFETs) and 2D negative capacitance field effect transistors (NCFETs), outlining their potential in low-power applications as a technological option beyond scaled logic switches. Above all, we show our perspective at 2D low-power logic transistors, including the ultra-thin equivalent oxide thickness (EOT), reducing density of interface trap, reliability, operation speed etc. of 2D MOSFETs and NCFETs.

  • Some recent advances in ab initio calculations of nonradiative decay rates of point defects in semiconductors

    Linwang Wang

    J. Semicond.  2019, 40 (9): 091101

    doi: 10.1088/1674-4926/40/9/091101

    Abstract Full Text PDF Get Citation

    In this short review, we discuss a few recent advances in calculating the nonradiative decay rates for point defects in semiconductors. We briefly review the debates and connections of using different formalisms to calculate the multi-phonon processes. We connect Dr. Huang’s formula with Marcus theory formula in the high temperature limit, and point out that Huang’s formula provide an analytical expression for the phonon induced electron coupling constant in the Marcus theory formula. We also discussed the validity of 1D formula in dealing with the electron transition processes, and practical ways to correct the anharmonic effects.

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