Current Issue
Volume 47, Issue 5, May 2026
Band engineering solar-blind ultraviolet photodetectors: Breaking the sensitivity-speed trade-off
Hongbin Wang, Peng Li, Jiangang Ma
J. Semicond.  2026, 47(5): 050201  doi: 10.1088/1674-4926/26010031

Multi-phase clock generation techniques toward high-frequency and wideband applications
Junyan Bi, Hao Xu, Na Yan
J. Semicond.  2026, 47(5): 050202  doi: 10.1088/1674-4926/26020027

A transferable route to two-dimensional gate-all-around electronics
Jian Wang, Ruiqin Wu, Jianfeng Jiang
J. Semicond.  2026, 47(5): 050401  doi: 10.1088/1674-4926/26020058

Supermoiré domains in helical trilayer graphene
Wen-Jun Wang, Ping-Heng Tan, Xin Zhang
J. Semicond.  2026, 47(5): 050402  doi: 10.1088/1674-4926/26030014

Improved solvent systems for the commercialization of perovskite photovoltaic modules
Zhaoyang Chu, Xiaotian Hu, Yiwang Chen
J. Semicond.  2026, 47(5): 050403  doi: 10.1088/1674-4926/26020044

One-dimensional charged domain walls in fluorite ferroelectrics
Jiajia Chen, Haoji Qian, Xiaoxi Li, Yan Liu, Chengji Jin, Genquan Han
J. Semicond.  2026, 47(5): 050404  doi: 10.1088/1674-4926/26020026

Three-panchromatic organic self-adaptive transistors for in-pixel color correction
Yuan Tan, Wei Deng, Xiujuan Zhang, Jiansheng Jie
J. Semicond.  2026, 47(5): 050405  doi: 10.1088/1674-4926/26020023

Room-temperature electrically injected GaN-based vertical-cavity surface-emitting laser with conductive nanoporous distributed Bragg reflector
Chuanjie Li, Meixin Feng, Jianping Liu, Aiqin Tian, Xuan Li, Wei Zhou, Rui Xi, Shuming Zhang, Qian Sun, Hui Yang
J. Semicond.  2026, 47(5): 050501  doi: 10.1088/1674-4926/25120042

PL spectra and PL dynamics of CsPbBr3 quantum dots in solution and film
Zhengda Dong, Dachuan Li, Pingyuan Yan, Chuanxiang Sheng
J. Semicond.  2026, 47(5): 052101  doi: 10.1088/1674-4926/25120029

Temperature dependent photoluminescence (PL) and time-resolved PL (TRPL) of CsPbBr3 quantum dots (QDs) in solution and film are investigated. The electron−phonon coupling strength of quantum dots in solution is found two times larger than that of thin films. The averaged phonon energy involved in luminescence is also significantly higher than that of thin films, indicating that ligands’ phonons are involved in optical processes in solution but not in film. TRPL shows that the luminescence lifetime of the solution (22.5 ns) is longer than that of the thin film (5 ns) at room temperature, and both decrease abnormally with decreasing temperature, ascribing to the thermally activated trap states for PL, the further analysis shows that the trap energy levels in the thin film are deeper (~20 meV) compared to ~4 meV in solution. Our work proves that the morphology of organic ligands can regulate electron−phonon interactions and optoelectronic properties in CsPbBr3 QDs, providing fundamental insights into its photophysics.

Temperature dependent photoluminescence (PL) and time-resolved PL (TRPL) of CsPbBr3 quantum dots (QDs) in solution and film are investigated. The electron−phonon coupling strength of quantum dots in solution is found two times larger than that of thin films. The averaged phonon energy involved in luminescence is also significantly higher than that of thin films, indicating that ligands’ phonons are involved in optical processes in solution but not in film. TRPL shows that the luminescence lifetime of the solution (22.5 ns) is longer than that of the thin film (5 ns) at room temperature, and both decrease abnormally with decreasing temperature, ascribing to the thermally activated trap states for PL, the further analysis shows that the trap energy levels in the thin film are deeper (~20 meV) compared to ~4 meV in solution. Our work proves that the morphology of organic ligands can regulate electron−phonon interactions and optoelectronic properties in CsPbBr3 QDs, providing fundamental insights into its photophysics.
A novel split gate and contact-field-plate LDMOS with enhanced BV−Ron,sp trade-off and improved FOM
Yiting Ye, Xiaoyun Huang, Yixian Song, Kai Xu
J. Semicond.  2026, 47(5): 052301  doi: 10.1088/1674-4926/25080033

To improve the breakdown voltage (BV)−specific on-resistance (Ron,sp) trade-off and enhance manufacturability, this article proposes a novel lateral diffused metal−oxide−semiconductor (LDMOS) structure that features a split gate and split contact field plate (CFP). This novel structure requires no additional bias voltages, masks, or process steps, making it fully compatible with the bipolar-CMOS-DMOS (BCD) process flow. The physical mechanisms are elucidated through technology computer-aided design (TCAD) simulations. In the on-state, the positively biased split gate forms an accumulation layer at the drift region surface, thereby reducing Ron,sp. In the off-state, both the split gate and split CFP introduce additional electric-field peaks that smooth the lateral electric field, thus preserving a high BV. Compared with the conventional CFP-LDMOS, the proposed CFP-LDMOS achieves an 8.52% reduction in Ron,sp without compromising BV, leading to an 8.07% improvement in the figure of merit (FOM). Notably, the proposed structure can be extended to LDMOS devices across different voltage levels within BCD platforms, demonstrating its broad applicability.

To improve the breakdown voltage (BV)−specific on-resistance (Ron,sp) trade-off and enhance manufacturability, this article proposes a novel lateral diffused metal−oxide−semiconductor (LDMOS) structure that features a split gate and split contact field plate (CFP). This novel structure requires no additional bias voltages, masks, or process steps, making it fully compatible with the bipolar-CMOS-DMOS (BCD) process flow. The physical mechanisms are elucidated through technology computer-aided design (TCAD) simulations. In the on-state, the positively biased split gate forms an accumulation layer at the drift region surface, thereby reducing Ron,sp. In the off-state, both the split gate and split CFP introduce additional electric-field peaks that smooth the lateral electric field, thus preserving a high BV. Compared with the conventional CFP-LDMOS, the proposed CFP-LDMOS achieves an 8.52% reduction in Ron,sp without compromising BV, leading to an 8.07% improvement in the figure of merit (FOM). Notably, the proposed structure can be extended to LDMOS devices across different voltage levels within BCD platforms, demonstrating its broad applicability.
Synergistic aluminum lattice doping and surface coating for high-performance Co-free Ni-rich cathodes
Lang Wen, Liang Shan, Yunhan Hu, Yiyong Zhang, Wen Lu, Wen-Hua Zhang, Junqiao Ding
J. Semicond.  2026, 47(5): 052302  doi: 10.1088/1674-4926/25110009

LiNi0.9Mn0.1O2 (LNM91) is a promising cobalt-free, high-energy cathode material for next-generation lithium-ion batteries, but its commercialization is challenged by rapid capacity fading resulting from bulk and interfacial structural degradation. Herein, an in situ surface-to-bulk dual-modification strategy is developed to synthesize 6Al-LNM91 (6 mol% Al modified LNM91) via a one-step calcination process based on Al diffusion chemistry. This method concurrently constructs a protective LiAlO2 coating and incorporates Al3+ into the bulk lattice, effectively enhancing the structural integrity of the cathode during cycling. The optimized 6Al-LNM91 cathode delivers a remarkable rate capability of 165 mA∙h∙g−1 at 10 C and maintains 94.03% capacity retention after 120 cycles at 0.5 C (2.8−4.4 V), substantially outperforming the pristine material (76.82% of LNM91). This organic solvent-free, single-step modification approach offers a scalable and efficient route for improving high-nickel layered oxide cathodes.

LiNi0.9Mn0.1O2 (LNM91) is a promising cobalt-free, high-energy cathode material for next-generation lithium-ion batteries, but its commercialization is challenged by rapid capacity fading resulting from bulk and interfacial structural degradation. Herein, an in situ surface-to-bulk dual-modification strategy is developed to synthesize 6Al-LNM91 (6 mol% Al modified LNM91) via a one-step calcination process based on Al diffusion chemistry. This method concurrently constructs a protective LiAlO2 coating and incorporates Al3+ into the bulk lattice, effectively enhancing the structural integrity of the cathode during cycling. The optimized 6Al-LNM91 cathode delivers a remarkable rate capability of 165 mA∙h∙g−1 at 10 C and maintains 94.03% capacity retention after 120 cycles at 0.5 C (2.8−4.4 V), substantially outperforming the pristine material (76.82% of LNM91). This organic solvent-free, single-step modification approach offers a scalable and efficient route for improving high-nickel layered oxide cathodes.
An extended overlay assessment model with process correlation analysis for sub-100-nm accuracy wafer bonding
Rui Wang, Sen Lu, Kaiming Yang, Yu Zhu
J. Semicond.  2026, 47(5): 052303  doi: 10.1088/1674-4926/25120038

To address the demand for sub-100-nm overlay accuracy in wafer bonding for 3D integration, this study proposes an extended overlay assessment model integrating physical mechanisms and data-driven approaches, along with a correlation analysis methodology with process parameters. Rigid-body models inadequately characterize systematic deformations from crystalline anisotropy and process stresses. To overcome this, we construct an extended overlay model based on Zernike polynomials, incorporating physically meaningful terms for precise description of non-uniform wafer deformation. An innovative Zernike term selection strategy combining physics-guided pre-screening and AIC-optimized stepwise regression resolves overfitting/underfitting, enhancing generalizability and interpretability. Validation using patterned wafer geometry (PWG) data shows the model achieves R² > 0.70 for both net bonding deformation and lithography-compensable components, demonstrating excellent deformation decomposition. Correlation analysis of multiple process experiments reveals strong correlations (|r| > 0.85) between key process parameters (e.g., peak bonding head force) and specific Zernike modes, providing evidence for suppressing detrimental deformations via process optimization. This research establishes a complete framework from theory to experimental verification and process traceability, laying a foundation for mechanism diagnosis, predictive compensation, and closed-loop control in high-precision wafer bonding.

To address the demand for sub-100-nm overlay accuracy in wafer bonding for 3D integration, this study proposes an extended overlay assessment model integrating physical mechanisms and data-driven approaches, along with a correlation analysis methodology with process parameters. Rigid-body models inadequately characterize systematic deformations from crystalline anisotropy and process stresses. To overcome this, we construct an extended overlay model based on Zernike polynomials, incorporating physically meaningful terms for precise description of non-uniform wafer deformation. An innovative Zernike term selection strategy combining physics-guided pre-screening and AIC-optimized stepwise regression resolves overfitting/underfitting, enhancing generalizability and interpretability. Validation using patterned wafer geometry (PWG) data shows the model achieves R² > 0.70 for both net bonding deformation and lithography-compensable components, demonstrating excellent deformation decomposition. Correlation analysis of multiple process experiments reveals strong correlations (|r| > 0.85) between key process parameters (e.g., peak bonding head force) and specific Zernike modes, providing evidence for suppressing detrimental deformations via process optimization. This research establishes a complete framework from theory to experimental verification and process traceability, laying a foundation for mechanism diagnosis, predictive compensation, and closed-loop control in high-precision wafer bonding.
Extremely low sheet resistance of ultra-thin AlN barrier HEMTs by plasma-assisted molecular beam epitaxy
Li Liu, Hanxiang Jia, Jiajie Pan, Hao Ying, Yiyuan Sun, Lei Pan, Bo Zhao, Jun Liu, Shuangzan Lu
J. Semicond.  2026, 47(5): 052501  doi: 10.1088/1674-4926/25110027

AlN/GaN high-electron-mobility transistor (HEMT) equipped with ultra-thin AlN barrier epitaxial structures were grown on 6-inch and 8-inch Si-based GaN templates via plasma-assisted molecular beam epitaxy (PAMBE). The AlN barrier thickness was systematically optimized to improve the properties of two-dimensional electron gas (2DEG). Structural and electrical characterizations were performed by atomic force microscopy (AFM), transmission electron microscopy (TEM), contact and non-contact Hall measurements. At an optimal AlN barrier thickness, an extremely low sheet resistance of 159.9 Ω/□ by contact Hall and 143.8 Ω/□ by non-contact Hall was achieved on the 6-inch HEMT wafer, marking a significant improvement over state-of-the-art Si-based GaN HEMTs. The epitaxial surface exhibited excellent morphology with a root-mean-square (RMS) roughness of 0.45 nm. Moreover, cross-sectional TEM analysis of PAMBE-grown AlN/GaN HEMT revealed an atomically sharp and structurally coherent heterointerface, which is critical for achieving high electron mobility and reduced scattering loss. In addition, the 8-inch HEMT demonstrated a sheet resistance (Rs) as low as 115 Ω/□ by non-contact Hall with a uniformity of 2.13%, outperforming competing technologies from other companies on the market.

AlN/GaN high-electron-mobility transistor (HEMT) equipped with ultra-thin AlN barrier epitaxial structures were grown on 6-inch and 8-inch Si-based GaN templates via plasma-assisted molecular beam epitaxy (PAMBE). The AlN barrier thickness was systematically optimized to improve the properties of two-dimensional electron gas (2DEG). Structural and electrical characterizations were performed by atomic force microscopy (AFM), transmission electron microscopy (TEM), contact and non-contact Hall measurements. At an optimal AlN barrier thickness, an extremely low sheet resistance of 159.9 Ω/□ by contact Hall and 143.8 Ω/□ by non-contact Hall was achieved on the 6-inch HEMT wafer, marking a significant improvement over state-of-the-art Si-based GaN HEMTs. The epitaxial surface exhibited excellent morphology with a root-mean-square (RMS) roughness of 0.45 nm. Moreover, cross-sectional TEM analysis of PAMBE-grown AlN/GaN HEMT revealed an atomically sharp and structurally coherent heterointerface, which is critical for achieving high electron mobility and reduced scattering loss. In addition, the 8-inch HEMT demonstrated a sheet resistance (Rs) as low as 115 Ω/□ by non-contact Hall with a uniformity of 2.13%, outperforming competing technologies from other companies on the market.
Investigation of trapping dynamics and defect evolution in 150 nm GaN-on-SiC HEMTs under early X-band RF stress
El Mehdi Meknassi, Niemat Moultif, Sebastien Duguay, Benoit Lambert, Gabriel Bertao, Olivier Latry
J. Semicond.  2026, 47(5): 052502  doi: 10.1088/1674-4926/25080031

This work focuses on the early-life drift mechanisms in 150 nm AlGaN/GaN HEMTs on SiC under RF-HTOL stress at 9 GHz and 130 °C. Electrical measurements during the first hours of stress reveal significant shifts in threshold voltage, transconductance, and drain lag, indicating the activation of deep traps located in the buffer. A transient increase in gate leakage current is also observed under reverse gate bias, suggesting additional trapping or conduction paths at the AlGaN/SiN or cap/passivation interface. These electrical instabilities coincide with a progressive degradation of RF performance, notably in gain and power-added efficiency. Electroluminescence measurements further support the presence of electrically active defects, with distinct spatial patterns depending on the bias configuration.

This work focuses on the early-life drift mechanisms in 150 nm AlGaN/GaN HEMTs on SiC under RF-HTOL stress at 9 GHz and 130 °C. Electrical measurements during the first hours of stress reveal significant shifts in threshold voltage, transconductance, and drain lag, indicating the activation of deep traps located in the buffer. A transient increase in gate leakage current is also observed under reverse gate bias, suggesting additional trapping or conduction paths at the AlGaN/SiN or cap/passivation interface. These electrical instabilities coincide with a progressive degradation of RF performance, notably in gain and power-added efficiency. Electroluminescence measurements further support the presence of electrically active defects, with distinct spatial patterns depending on the bias configuration.
Investigation of a gate-series-diode structure for improving schottky-type p-GaN gate reliability
Xuejing Sun, Shenglei Zhao, Yinhe Wu, Longyang Yu, Juan Gui, Ga Zhang, Xiufeng Song, Shuzhen You, Song Yang, Hui Sun, Bin Hu, Huantao Duan, Jin Rao, Zhen Chen, Yue Hao, Jincheng Zhang
J. Semicond.  2026, 47(5): 052503  doi: 10.1088/1674-4926/25100012

In this paper, a novel gate-series-diode structure for the Schottky-type p-GaN HEMTs is proposed, and the impact of the proposed structure on gate−source voltage oscillation is investigated when the device is turned on. The proposed structure is capable of effectively mitigating the gate−source voltage overshoot problem of GaN device, and has little effect on the switching characteristics. The gate voltage oscillations can be greatly stabilized at the steady-state turn-on voltage level when the turn-on voltage is 5 V. Compared with the conventional structure, the overshoots of the proposed structure reduce by 31.4%−71.4% and 40.6%−80.4% respectively under the two pulses, as drain−source voltage rises. The proposed structure is proved to be a potential method on improving gate reliability of the most GaN power devices.

In this paper, a novel gate-series-diode structure for the Schottky-type p-GaN HEMTs is proposed, and the impact of the proposed structure on gate−source voltage oscillation is investigated when the device is turned on. The proposed structure is capable of effectively mitigating the gate−source voltage overshoot problem of GaN device, and has little effect on the switching characteristics. The gate voltage oscillations can be greatly stabilized at the steady-state turn-on voltage level when the turn-on voltage is 5 V. Compared with the conventional structure, the overshoots of the proposed structure reduce by 31.4%−71.4% and 40.6%−80.4% respectively under the two pulses, as drain−source voltage rises. The proposed structure is proved to be a potential method on improving gate reliability of the most GaN power devices.
Low-threshold GaN surface emitting lasers: A comparative study of circular grating and photonic crystal designs
Yuzhen Zheng, Zhiwei Sun, Tong Xu, Bolin Zhou, Xiaoqi Yu, Xinrui Wang, Junfei Wang, Yongchen Miao, Suman Xia, Zhi Liu, Zengcheng Li, Pengyan Wen, Kanglin Xiong, Jianping Liu, Huaibing Wang, Hui Yang
J. Semicond.  2026, 47(5): 052504  doi: 10.1088/1674-4926/25120001

We demonstrate room-temperature pulsed lasing of two types of GaN-based surface emitting lasers (SEL) fabricated without epitaxial regrowth. We present a direct comparison between a circular grating (CGSEL) and a photonic crystal (PCSEL) design. The devices are realized by etching the photonic structures directly into the p-GaN cladding, and utilizing a patterned indium tin oxide (ITO) top contact. Both designs exhibit lasing near 438 nm under pulsed current injection. The CGSEL, incorporating a central defect, achieves a low threshold current density (<1 kA/cm2) and a small divergence angle (≈0.15°) by coupling to a bandgap defect mode. In contrast, the PCSEL shows a higher threshold current density and lases on a 1D band-edge mode, resulting in a cross-shaped far-field pattern. These results confirm the regrowth-free method as a viable route for manufacturable GaN SELs. Crucially, the comparative study identifies the CGSEL defect-mode design as a more robust path toward high-performance lasing in low-confinement epitaxial structures.

We demonstrate room-temperature pulsed lasing of two types of GaN-based surface emitting lasers (SEL) fabricated without epitaxial regrowth. We present a direct comparison between a circular grating (CGSEL) and a photonic crystal (PCSEL) design. The devices are realized by etching the photonic structures directly into the p-GaN cladding, and utilizing a patterned indium tin oxide (ITO) top contact. Both designs exhibit lasing near 438 nm under pulsed current injection. The CGSEL, incorporating a central defect, achieves a low threshold current density (<1 kA/cm2) and a small divergence angle (≈0.15°) by coupling to a bandgap defect mode. In contrast, the PCSEL shows a higher threshold current density and lases on a 1D band-edge mode, resulting in a cross-shaped far-field pattern. These results confirm the regrowth-free method as a viable route for manufacturable GaN SELs. Crucially, the comparative study identifies the CGSEL defect-mode design as a more robust path toward high-performance lasing in low-confinement epitaxial structures.
Direct fabrication of record low specific resistivity metal contacts for n-type AlxGa1−xN (x ≥ 0.8)
Tingang Liu, Haicheng Cao, Mingtao Nong, Zhiyuan Liu, Zixian Jiang, Kexin Ren, Glen Isaac Maciel Garcia, Xiaohang Li
J. Semicond.  2026, 47(5): 052505  doi: 10.1088/1674-4926/25120008

Al-rich AlxGa1−xN (x ≥ 0.8) is promising for power and deep-ultraviolet (DUV) optoelectronic applications, owing to its ultra-wide bandgap and excellent thermal stability. However, forming low-resistivity contacts on n-type Al-rich AlGaN remains a significant challenge. In this work, we utilized an Au-free Ti/Al/Ti metal stack contact on n-type Al-rich AlGaN without graded layers. Record-low contact resistivities were achieved after annealing: 1.52 × 10−6 Ω·cm2 for n-Al0.8Ga0.2N, 3.56 × 10−6 Ω·cm2 for n-Al0.86Ga0.14N, and 5.79 × 10−5 Ω·cm2 for n-Al0.9Ga0.1N. These results demonstrate a significant advancement in forming low-resistance contacts directly on Al-rich n-AlGaN, offering a viable path forward for next-generation power electronics and DUV optoelectronic devices.

Al-rich AlxGa1−xN (x ≥ 0.8) is promising for power and deep-ultraviolet (DUV) optoelectronic applications, owing to its ultra-wide bandgap and excellent thermal stability. However, forming low-resistivity contacts on n-type Al-rich AlGaN remains a significant challenge. In this work, we utilized an Au-free Ti/Al/Ti metal stack contact on n-type Al-rich AlGaN without graded layers. Record-low contact resistivities were achieved after annealing: 1.52 × 10−6 Ω·cm2 for n-Al0.8Ga0.2N, 3.56 × 10−6 Ω·cm2 for n-Al0.86Ga0.14N, and 5.79 × 10−5 Ω·cm2 for n-Al0.9Ga0.1N. These results demonstrate a significant advancement in forming low-resistance contacts directly on Al-rich n-AlGaN, offering a viable path forward for next-generation power electronics and DUV optoelectronic devices.
GaN RF HEMT on bulk single crystal AlN substrate with no buffer layer
Yinghao Chen, Genhao Liang, Wenjun Liu, Zhengguang Fang, Yachao Zhang, Jun Zhang, Kai Wang, Lishan Zhao
J. Semicond.  2026, 47(5): 052506  doi: 10.1088/1674-4926/25120046

In this letter we report the morphological, electrical and thermal transport properties of a high electron mobility transistor (HEMT) style epitaxial wafer, where an approximately 2000 nm thick GaN layer has been directly deposited on a bulk single crystal AlN (BCS AlN) substrate with no buffer layer in between, and also the experimental results of DC and RF properties of a HEMT device based on such a wafer. The sample achieved very smooth surface morphology and roughness down to Ra = 0.172 nm over an area of 1 μm × 1 μm in AFM measurements. Electrical transport measurements showed sheet carrier concentration of 7.3 × 1012 cm−2, Hall mobility of 2220 cm2/(V·s) and sheet resistance of 386 Ω/sq. The measured maximum trans-conductance Gm of the fabricated HEMT device was 250 mS/mm at a gate bias voltage of −1.8 V. With a gate length of 500 nm and a gate-to-drain distance of 4.7 μm, the fT and fmax, derived from S-parameters measurements, are 25.9 and 54 GHz, respectively. Large-signal RF measurement exhibited a high linear power gain (Gp) of 25.2 dB and a peak output power (Pout) density of 7.2 W/mm@1.5 GHz, associated with a power-added efficiency (PAE) of 40.9%. Comparing with the structure with a 500 nm thick AlGaN buffer, the total thermal resistance of the structure in our device decreased by 44%. This work confirms the technical feasibility of fabricating GaN HEMT devices on BCS AlN substrates without any additional buffer layer, and the excellent electric and thermal transport properties of the simplified wafer structure indicate a bright future of BCS AlN-based GaN HEMT devices in ultra-high-frequency and high-power-density nitride electronics.

In this letter we report the morphological, electrical and thermal transport properties of a high electron mobility transistor (HEMT) style epitaxial wafer, where an approximately 2000 nm thick GaN layer has been directly deposited on a bulk single crystal AlN (BCS AlN) substrate with no buffer layer in between, and also the experimental results of DC and RF properties of a HEMT device based on such a wafer. The sample achieved very smooth surface morphology and roughness down to Ra = 0.172 nm over an area of 1 μm × 1 μm in AFM measurements. Electrical transport measurements showed sheet carrier concentration of 7.3 × 1012 cm−2, Hall mobility of 2220 cm2/(V·s) and sheet resistance of 386 Ω/sq. The measured maximum trans-conductance Gm of the fabricated HEMT device was 250 mS/mm at a gate bias voltage of −1.8 V. With a gate length of 500 nm and a gate-to-drain distance of 4.7 μm, the fT and fmax, derived from S-parameters measurements, are 25.9 and 54 GHz, respectively. Large-signal RF measurement exhibited a high linear power gain (Gp) of 25.2 dB and a peak output power (Pout) density of 7.2 W/mm@1.5 GHz, associated with a power-added efficiency (PAE) of 40.9%. Comparing with the structure with a 500 nm thick AlGaN buffer, the total thermal resistance of the structure in our device decreased by 44%. This work confirms the technical feasibility of fabricating GaN HEMT devices on BCS AlN substrates without any additional buffer layer, and the excellent electric and thermal transport properties of the simplified wafer structure indicate a bright future of BCS AlN-based GaN HEMT devices in ultra-high-frequency and high-power-density nitride electronics.
Experimental and simulated studies on thin-film thermoelectric generator insensitive to tensile strain
Yanlong Li, Hao Sun, Zhao Zhao, Yingli Shi, Guozhen Shen
J. Semicond.  2026, 47(5): 052601  doi: 10.1088/1674-4926/25110021

Thermoelectric power generation has attracted significant interest for its capability to directly convert thermal energy into electricity. Among various configurations, thin-film thermoelectric generators (TEGs) stand out due to their lightweight nature and facile integration, offering promising applications in waste heat recovery and wearable electronics. However, the performance of such devices under complex mechanical conditions, particularly under biaxial tensile strain, remains underexplored. In this work, we designed and fabricated a thin-film TEG insensitive to tensile strain and performed a parametric analysis using validated 3D numerical simulations to evaluate the effects of environmental conditions, material properties, and geometric parameters. Notably, the designed device maintained stable electrical performance under various biaxial tensile strains. Owing to its miniature and thin profile, variations in any component of the generator significantly affected its electrical performance. The results indicated that reduced thermal conductivity of the substrate and Ecoflex layer, as well as a thinner substrate, enhance the output voltage. Furthermore, longer thermoelectric legs within a certain range contributed to higher output voltage. Higher output voltage was more readily achieved when the inner radius length was close to the radius of the heat source. This work provides valuable insights for the development of high-performance compliant TEGs applicable in dynamic mechanical environments, such as complex stretching in the back and shoulder–elbow regions induced by human motion.

Thermoelectric power generation has attracted significant interest for its capability to directly convert thermal energy into electricity. Among various configurations, thin-film thermoelectric generators (TEGs) stand out due to their lightweight nature and facile integration, offering promising applications in waste heat recovery and wearable electronics. However, the performance of such devices under complex mechanical conditions, particularly under biaxial tensile strain, remains underexplored. In this work, we designed and fabricated a thin-film TEG insensitive to tensile strain and performed a parametric analysis using validated 3D numerical simulations to evaluate the effects of environmental conditions, material properties, and geometric parameters. Notably, the designed device maintained stable electrical performance under various biaxial tensile strains. Owing to its miniature and thin profile, variations in any component of the generator significantly affected its electrical performance. The results indicated that reduced thermal conductivity of the substrate and Ecoflex layer, as well as a thinner substrate, enhance the output voltage. Furthermore, longer thermoelectric legs within a certain range contributed to higher output voltage. Higher output voltage was more readily achieved when the inner radius length was close to the radius of the heat source. This work provides valuable insights for the development of high-performance compliant TEGs applicable in dynamic mechanical environments, such as complex stretching in the back and shoulder–elbow regions induced by human motion.
Defect and stress co-management via bifunctional molecular engineering for high-efficiency and stable CsPbI3 perovskite solar cells
Huifang Han, Jia Xu, Jianxi Yao
J. Semicond.  2026, 47(5): 052801  doi: 10.1088/1674-4926/25120041

Inorganic cesium lead iodide (CsPbI3) perovskites are promising photovoltaic materials owing to their excellent thermal stability and optoelectronic properties. However, CsPbI3 film fabricated via solution processing typically suffers from high defect densities and detrimental residual tensile stress due to uncontrolled crystallization and thermal expansion mismatch with the substrate, which impedes its practical application. Herein, we introduce ammonium benzenesulfonate (ABS) as a bifunctional additive to modulate crystallization, thereby passivating defects and regulating residual stress. The sulfonate group of ABS coordinates with undercoordinated Pb2+ ions, while its ammonium group forms hydrogen bonds with iodide ions. The molecular structure of ABS bridges adjacent [PbI6]4− octahedra at grain boundaries. This dual interaction effectively enhanced crystallinity, suppressed non-radiative recombination, and improved structural stability. As a result, ABS-modified CsPbI3-based perovskite solar cells achieve an impressive power conversion efficiency (PCE) of 21.21% under standard illumination. Remarkably, they deliver a PCE of 40.85% under indoor lighting conditions. Moreover, unencapsulated devices retains 91% of their initial PCE after 800 h of storage in ambient air at a relative humidity of 5%.

Inorganic cesium lead iodide (CsPbI3) perovskites are promising photovoltaic materials owing to their excellent thermal stability and optoelectronic properties. However, CsPbI3 film fabricated via solution processing typically suffers from high defect densities and detrimental residual tensile stress due to uncontrolled crystallization and thermal expansion mismatch with the substrate, which impedes its practical application. Herein, we introduce ammonium benzenesulfonate (ABS) as a bifunctional additive to modulate crystallization, thereby passivating defects and regulating residual stress. The sulfonate group of ABS coordinates with undercoordinated Pb2+ ions, while its ammonium group forms hydrogen bonds with iodide ions. The molecular structure of ABS bridges adjacent [PbI6]4− octahedra at grain boundaries. This dual interaction effectively enhanced crystallinity, suppressed non-radiative recombination, and improved structural stability. As a result, ABS-modified CsPbI3-based perovskite solar cells achieve an impressive power conversion efficiency (PCE) of 21.21% under standard illumination. Remarkably, they deliver a PCE of 40.85% under indoor lighting conditions. Moreover, unencapsulated devices retains 91% of their initial PCE after 800 h of storage in ambient air at a relative humidity of 5%.